AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 392

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Table 24-3.
Table 24-4.
Table 24-5.
32054F–AVR32–09/09
DI field
Di (decimal)
FI field
Fi (decimal
Fi/Di
16
32
12
20
1
2
4
8
23.25
11.62
46.5
18.6
Binary and Decimal Values for Di
Binary and Decimal Values for Fi
Possible Values for the Fi/Di Ratio
372
372
186
0000
93
31
372
0001
1
0001
139.5
69.75
34.87
17.43
372
46.5
27.9
558
558
279
Di is a binary value encoded on a 4-bit field, named DI, as represented in
Fi is a binary value encoded on a 4-bit field, named FI, as represented in
Table 24-5
baud rate clock.
If the USART is configured in ISO7816 Mode, the clock selected by the USCLKS field in the
Mode Register (MR) is first divided by the value programmed in the field CD in the Baud Rate
Generator Register (BRGR). The resulting clock can be provided to the CLK pin to feed the
smart card clock inputs. This means that the CLKO bit can be set in MR.
This clock is then divided by the value programmed in the FI_DI_RATIO field in the FI_DI_Ratio
register (FIDI). This is performed by the Sampling Divider, which performs a division by up to
2047 in ISO7816 Mode. The non-integer values of the Fi/Di Ratio are not supported and the user
must program the FI_DI_RATIO field to a value as close as possible to the expected value.
The FI_DI_RATIO field resets to the value 0x174 (372 in decimal) and is the most common
divider between the ISO7816 clock and the bit rate (Fi = 372, Di = 1).
Figure 24-5
and the ISO 7816 clock.
0010
0010
558
2
23.25
46.5
37.2
774
744
372
186
93
62
shows the resulting Fi/Di Ratio, which is the ratio between the ISO7816 clock and the
shows the relation between the Elementary Time Unit, corresponding to a bit time,
0011
744
139.5
69.75
34.87
1116
1116
55.8
558
279
0011
93
4
0100
1116
1488
1488
46.5
74.4
744
372
186
124
93
0100
0101
1488
8
232.5
116.2
58.13
1806
1860
930
465
155
93
0110
1860
0101
16
42.66
25.6
512
512
256
128
64
32
16
1001
512
0110
38.4
768
768
384
192
96
48
24
64
32
1010
768
85.33
1024
1024
51.2
512
256
128
64
32
1011
1024
AT32AP7002
1000
Table
12
Table
1536
1536
76.8
24-4.
768
384
192
128
24-3.
1100
1536
96
48
1001
20
170.6
102.4
1101
2048
2048
2048
1024
512
256
128
64
392