AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 448

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

25.7.3.4
Figure 25-6. Audio Transfer (PCM L Front, PCM R Front) on Channel x
25.7.3.5
32054F–AVR32–09/09
Read access to
(Codec output)
AC97C_RHRx
(AC97C_SR)
RXRDYCx
AC97RX
AC97FS
Slot #
Receive Operation
AC97 Input Frame
TAG
0
The AC97 Controller can also receive data from AC97 Codec. Data is received in the channel’s
shift register and then transferred to the AC97 Controller Channel x Read Holding Register. To
read the newly received data, the application must perform the following steps:
The application can also wait for an interrupt notice in order to read data from CxRHR. The inter-
rupt remains active until RXRDY is cleared by reading CxSR.
The RXRDY flag in CxSR is set automatically when data is received in the Channel x shift regis-
ter. Data is then shifted to CxRHR.
If the previously received data has not been read by the application, the new data overwrites the
data already waiting in CxRHR, therefore the OVRUN flag in CxSR is raised. The application
can either poll the OVRUN flag in CxSR or wait for an interrupt notice. The interrupt remains
active until the OVRUN flag in CxSR is set.
The AC97 Controller can also be used in sound recording devices in association with an AC97
Codec. The AC97 Controller may also be exposed to heavy PCM transfers.
The application can use the DMAC connected to both channels in order to reduce processor
overhead and increase performance especially under an operating system.
The DMAC receive counter values must be equal to the number of PCM samples to be received.
When more than one timeslot is assigned to a channel using DMA, the different timeslot sam-
ples will be interleaved.
The AC97 Controller receives a thirteen slot frame on the AC-Link sent by the AC97 Codec. The
first slot (tag slot or slot 0) flags the validity of the entire frame and the validity of each slot;
whether a slot carries valid data or not. Slots 1 and 2 are used if the application requires status
informations from AC97 Codec. Slots [3:12] are used according to AC97 Controller Output
Channel Assignment Register (ICA) content. The AC97 Controller will not receive any data from
any slot if ICA is not assigned to a channel in input.
STATUS
•Poll RXRDY flag in AC97 Controller Channel x Status Register (CxSR). x being one of the 2
•Read data from AC97 Controller Channel x Read Holding Register.
ADDR
channels.
1
STATUS
DATA
2
LEFT
3
PCM
RIGHT
PCM
4
LINE 1
DAC
5
6
PCM
MIC
RSVED
7
RSVED
8
RSVED
9
LINE 2
ADC
10
AT32AP7002
HSET
11
ADC
STATUS
12
IO
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