AT32AP7002-CTUT Atmel, AT32AP7002-CTUT Datasheet - Page 531

• Manufacturer Part Number: AT32AP7002-CTUT
• Description: IC MCU 32BIT AVR32 196-CBGA
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7002-CTUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, LCD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-CBGA
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, PS2, SPI, SSC, UART, USART, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 2 Channel
• Package: 196CTBGA
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

28.5.2.2
Table 28-5.
Table 28-6.
Table 28-7.
Notes:
28.6
28.6.1
32054F–AVR32–09/09
2
7
2
7
2
7
2
6
2
6
2
6
BA[1:0]
1. M0 is the byte address inside a 16-bit halfword.
Product Dependencies
2
5
2
5
2
5
BA[1:0]
BA[1:0]
I/O Lines
16-bit memory data bus width
SDRAM Configuration Mapping: 2K Rows, 256/512/1024/2048 Columns
2
4
BA[1:0]
SDRAM Configuration Mapping: 4K Rows, 256/512/1024/2048 Columns
2
4
BA[1:0]
SDRAM Configuration Mapping: 8K Rows, 256/512/1024/2048 Columns
2
4
BA[1:0]
2
3
BA[1:0]
2
3
BA[1:0]
2
3
BA[1:0]
2
2
BA[1:0]
2
2
BA[1:0]
2
2
In order to use this module, other parts of the system must be configured correctly, as described
below.
The SDRAMC module signals pass through the External Bus Interface (EBI) module where they
are multiplexed. The user must first configure the I/O controller to assign the EBI pins corre-
sponding to SDRAMC signals to their peripheral function. If I/O lines of the EBI corresponding to
SDRAMC signals are not used by the application, they can be used for other purposes by the
I/O Controller.
2
1
BA[1:0]
2
1
2
1
2
0
2
0
2
0
1
9
1
9
1
9
Row[12:0]
Row[11:0]
1
8
1
8
1
8
Row[10:0]
Row[12:0]
Row[11:0]
1
7
1
7
1
7
Row[10:0]
Row[12:0]
Row[11:0]
1
6
1
6
1
6
Row[10:0]
Row[12:0]
Row[11:0]
1
5
1
5
1
5
CPU Address Line
CPU Address Line
CPU Address Line
Row[10:0]
1
4
1
4
1
4
1
3
1
3
1
3
1
2
1
2
1
2
1
1
1
1
1
1
1
0
1
0
1
0
9
9
9
8
8
8
7
7
7
Column[10:0]
Column[10:0]
Column[10:0]
Column[9:0]
Column[9:0]
Column[9:0]
6
6
6
Column[8:0]
Column[8:0]
Column[8:0]
Column[7:0]
Column[7:0]
Column[7:0]
5
5
5
AT32AP7002
4
4
4
3
3
3
2
2
2
1
1
1
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
531
0
0
0