cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 99

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cx28560

Manufacturer Part Number
cx28560
Description
Hdlc Controller
Manufacturer
Mindspeed Technologies
Datasheet
CX28560 Data Sheet
Table 5-9. ECD Field Descriptions
Table 5-10. Channel Configuration Service Request Descriptor
Table 5-11. CCD Field Descriptions
28560-DSH-001-B
OPCODE
SACKIEN
LENGTH
BYTE ENABLE
INCDIS
Shared Memory Pointer
EBUS Base Address
Dword Number
dword 0
dword 1
dword 2
dword 3
OPCODE
SACKIEN
CHANNEL
Tx/Rx
RSVD
Descriptor Field
Descriptor Field
Bit 31
OPCODE[31:27]
Size
11
5
1
1
30 + 2
Size
14
32
Table 5-9
Channel Configuration Descriptor (CCD)
Table 5-10
Table 5-11
5
1
4
1
Command requested by the host. (CH_ACT, CH_DEACT, NOP,)
0 = SACK interrupt disabled.
1= SACK interrupt enabled – after completion of the command, a service acknowledge (SACK)
interrupt will be generated.
Channel Number. This field is interpreted as a channel number for the CH_ACT and CH_DEACT
commands. The field is interpreted as reserved for the NOP command.
0 = the command is for a receive channel.
1 = the command is for a transmit channel.
Reserved.
Command requested by the host. (EBUS_WR, EBUS_RD)
0 = SACK interrupt disabled.
1 = SACK interrupt enabled.
Number of double words in the memory transaction request..
Determines which byte lanes carry meaningful data. BE [0] applies to byte 0 (LSB). BE[3]
Applies to byte 3 (MSB). These bits are active high, i.e. ‘1’ indicates enable, ‘0’ indicates
disable
Disable EBUS address incrementing for FIFO access.
When this bit is set, the CX28560 will access the same address LENGTH times (FIFO access).
When this bit is zero, the CX28560 will automatically increment the address transmitted by one
for each access performed (i.e., final address will be EBUS Base Address + Length – 1).
exists. The pointer is Dword aligned (last 2 bits should be set to zero).
EBUS base (byte aligned) address for an EBUS transaction.
The address of shared memory EBUS base address, where the configuration of local devices
describes these fields.
presents the structure of CCD.
describes these fields.
Mindspeed Technologies™
SACKIEN[26]
Advance Information
Reserved[25:12]
Reserved
Reserved
Reserved
Description
Description
Rx/Tx[11]
The CX28560 Memory Organization
CHANNEL[10:0]
Bit 0
5
-
9

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