cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 111

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

CX28560 Data Sheet
5.3.2.3
28560-DSH-001-B
INTA# Signal Line
The Host must monitor the INTA# signal line at all times. An assertion of this line
signifies the updating of the WRPTR field in the Interrupt Status Descriptor,
indicating that Interrupt Descriptors have been transferred to the Interrupt Queue in
shared memory from the internal interrupt queue.
Upon detection of the INTA# assertion, the Host must perform a direct read of the
Interrupt Status Descriptor from within CX28560. This descriptor provides the offset
to the location of the first descriptor in the Host queue that has not been served, the
offset to the location of the last descriptor serviced by the Host, and the determination
if the queue is full. The INTA* signal is deasserted on each read of the Interrupt
Status Descriptor.
The Host applies its interrupt service routines to service each of the descriptors. As
the Host finishes servicing a number of descriptors, it must write the offset to the
location of the last serviced descriptor back into the RDPTR field of the Interrupt
Status Descriptor. A write to this field indicates to CX28560 that the descriptor
locations, which were waiting to be serviced, have been serviced and new descriptors
can be written.
Figure 5-1. Interrupt Notification to Host
NOTE:
CX28560 continues to write to available space regardless of whether the
Host updates the RDPTR field. The difference between the two interrupt
queue pointers RDPTR and WRPTR indicates the number of interrupts
still need to be serviced. When calculating the number of outstanding
interrupts, please make sure to take care of offsets, or pointers,
wraparound.
Mindspeed Technologies™
Unserviced Interrupt
Descriptors in the
Interrupt Queue
Internal Logic
CX28500
Advance Information
Figure 5-1
INTA*
illustrates the operation of INTA*.
Interrupt
Interrupt
Memory
Handler
Queue
The CX28560 Memory Organization
Host
500052_056
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