cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 212

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

Counters
A.2
A-2
Counter Latching
Counters are latched within a negligible delay of a pulse on the onesec pin. The
latching of counters implies that the values are held in the background to be read by
the system, and updates (during the next latching period) are made to an active set of
counters. Note that the system does not need to keep track of which set of counters is
the background because the CX28560 controls the internal addressing; externally,
both sets of counters are at the same address. The values held in the background
counters are overwritten when the next one-second pulse is received. The latching of
all counters is simultaneous, and the latched values can be read by a service routine
request. On activation and deactivation of a channel, all counters related to that
channel are set to zero.
Mindspeed Technologies™
Advance Information
CX28560 Data Sheet
28560-DSH-001-B