cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 36

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cx28560

Manufacturer Part Number
cx28560
Description
Hdlc Controller
Manufacturer
Mindspeed Technologies
Datasheet
Introduction
Table 1-6. Serial Interface (General) (1 of 3)
1-18
TSYNC[31:0]/
TSTUFF[31:0]
TCLK[31:0]
TDAT[31:0]
Pin Name
I/O
O
I
I
TCLK[31:0]
TCLK[31:0]
Ref Clk
Table 1-6
lists pins common to all ports.
Transmit Clock (TCLK[31:0]. If the serial port is configured in conventional mode,
TCLKx controls the rate at which data is transmitted and synchronizes transitions for
TDATx and sampling of TSYNCx. If the port is configured as a TSBUS port, TCLKx
controls the rate at which data is transmitted and synchronizes transitions for TDATx
and sampling of TSTUFFx and TSTBx (TSTBx only for transmit circuitry).
If in TSBUS with DS0 extraction mode in addition to the above, TCLKx also
synchronizes transitions of TGSYNCx.
Transmit Synchronization/TSBUS Transmit Stuff (TSYNCx[31:0]/TSTUFF[31:0]). If the
serial port is configured in conventional mode, this signal is defined as TSYNCx.
TSYNCx is sampled on the specified active edge of the corresponding TCLKx clock.
When TSYNCx signal goes from low to high, the start of transmit frame is indicated.
TSYNCx is ignored if the serial port is configured to operate in conventional
unchannelized mode. If the serial port is configured in T1 mode, the corresponding
data bit that latched out during the same bit time period (but not necessarily sampled at
the same clock edge) is the F-bit of the T1 frame. If the serial port is configured in
conventional channelized mode, the corresponding data bit that latched out during the
same bit time period (but not necessarily sampled at the same clock Edge) is bit 0 of
the first time slot of the N.... 64 frame.
Because the CX28560’s flywheel mechanism is always used in channelized mode, no
other synchronization signal is required to track the start of each subsequent frame.
If the port is configured to operate as TSBUS port, this signal is defined as TSTUFF. The
TSTUFF values are to either stuff (no TDAT output) or not stuff (TDAT valid). TSTUFF is
sampled on the specified active edge of the corresponding TCLKx. If the serial port
operates in TSBUS mode, TSTUFF assertion indicates that no data needs to be
transmitted in the 8
While operating in TSBUS mode, the CX28560 requires the following:
The stuff status for each time slot to be presented at its TSTUFF input exactly eight time
slots in advance of the actual time slot for which the stuff status is to be applied. The
amount of the TSTUFF advance is fixed at eight time slots, even though the number of
time slots within a frame may vary.
The CX28560 expects assertion of this signal within the first two bits of the time slot.
Assertion of this signal elsewhere in the time slot might result in undefined behavior.
Transmit Data (TDAT[31:0]) Serial data latched out on active edge of transmit clock,
TCLKx. If channel is unmapped to time slot, data bit is considered invalid and the
CX28560 outputs either three-state signal or logic 1 (user-configurable, see
53, TSIU Port Configuration
Mindspeed Technologies™
Advance Information
th
time slot after the assertion of the TSTUFF.
Register, field TRITX).
Description
CX28560 Data Sheet
28560-DSH-001-B
Table 5-

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