cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 117

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

CX28560 Data Sheet
Table 5-25. RSLP Channel Configuration Register (2 of 2)
28560-DSH-001-B
28:21
20:5
Bit
4:3
2
1
0
RMASK_SB[7:0]
RSVD
RMAXSEL[1:0]
RFCSTRANS
RBUFFIEN
RIDLEIEN
Field Name
Value
—
0
0
1
2
3
0
1
0
1
0
1
Only bits with a value of 1 contain relevant data (e.g., Mask = 10000001, then only bits 0
and 7 contain channel's data). Enables the sub-channeling feature. Note 0h is an invalid
value.
Reserved.
Message Length Check Disabled.
Message Length Check Enabled.
Use MAXFRM1 bit field in the message length descriptor for maximum receive message
length limit.
Message Length Check Enabled.
Use MAXFRM2 bit field in the message length descriptors maximum receive message
length limit.
Message Length Check Enabled.
Use MAXFRM3 bit field in the message length descriptor for maximum receive message
length limit.
FCS Transfer Normal.
Do not transfer received FCS to the host along with data message.
Non-FCS Mode.
Transfer received FCS to the host along with data message. In Non-FCS Mode short
message detection is disabled.
Overflow Interrupt disabled.
Overflow Interrupt enabled.
CHABT, CHIC, SHT Interrupt disabled.
CHABT, CHIC, SHT Interrupt enabled.
When the RSLP detects a change to abort or a change to idle code, the relevant interrupt
is generated. Setting this bit to 1 is also necessary if the Too Short counter in the
RBUFFC is to be used.
Data Mask.
Mindspeed Technologies™
Advance Information
Description
The CX28560 Memory Organization
5
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