adsp-bf548 Analog Devices, Inc., adsp-bf548 Datasheet - Page 74

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adsp-bf548

Manufacturer Part Number
adsp-bf548
Description
Blackfin Embedded Processor
Manufacturer
Analog Devices, Inc.
Datasheet

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ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
-10
-20
-30
-40
-50
-10
-20
-30
-40
-50
-60
-70
-80
-90
-10
-20
-30
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-50
-60
10
50
40
30
20
10
10
0
0
0
0
0
0
VOL
0.5
VOL
0.5
0.5
Figure 49. Drive Current E (High V
VOL
Figure 48. Drive Current E (Low V
2.7V, +105
1
2.25V, +105
Figure 47. Drive Current D
o
C
1
1
1.5
2.5V, +25
SOURCE VOLTAGE (V)
o
C
SOURCE VOLTAGE (V)
3.3V, +25
SOURCE VOLTAGE (V)
2.5V, +25
2.5V, +25
o
2
C
o
1.5
C
1.5
o
2.7V, -40
C
o
C
3.6V, -40
2.5
2.75V, -40
2.7V, -40
o
C
o
2
C
2
o
C
o
3
DDEXT
DDEXT
C
)
)
VOH
3.5
2.5
2.5
Rev. A | Page 74 of 88 | October 2008
4
3
3
TEST CONDITIONS
All timing parameters appearing in this data sheet were mea-
sured under the conditions described in this section.
shows the measurement point for ac measurements (except out-
put enable/disable). The measurement point V
or V
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high impedance state to the point when they
start driving. The output enable time t
the point when a reference signal reaches a high or low voltage
level to the point when the output starts driving as shown in the
output enable/disable diagram
t
switches to when the output voltage reaches 1.75 V (output
high) or 1.25 V (output low). Time t
when the output starts driving to when the output reaches the
1.25 V or 1.75 V trip voltage. Time t
the equation:
If multiple pins (such as the data bus) are enabled, the measure-
ment value is that of the first pin to start driving.
Output Disable Time
Output pins are considered to be disabled when they stop driv-
ing, go into a high impedance state, and start to decay from their
output high or low voltage. The time for the voltage on the bus
to decay by ΔV is dependent on the capacitive load, C
load current, I
equation:
The output disable time t
t
t
switches to when the output voltage decays ΔV from the mea-
sured output high or output low voltage. The time t
calculated with test loads C
ENA_MEASURED
DIS_MEASURED
DIS_MEASURED
OUTPUT
DDDDR
INPUT
Figure 50. Voltage Reference Levels for AC
Measurements (Except Output Enable/Disable)
OR
/2 depending on the pin under test.
V
t
and t
is the interval from when the reference signal
MEAS
is the interval from when the reference signal
ENA
L
. This decay time can be approximated by the
DECAY
t DECAY
=
t
ENA_MEASURED
as shown in
DIS
L
is the difference between
and I
=
(Figure
(
C L V
L
, and with ΔV equal to 0.25 V.
ENA
Figure
TRIP
Δ
ENA
51). The time
is calculated as shown in
) I L
is the interval from
is the interval from
51. The time
t
TRIP
MEAS
V
MEAS
is V
DECAY
Figure 50
L
and the
DDEXT
is
/2

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