adsp-bf548 Analog Devices, Inc., adsp-bf548 Datasheet - Page 34

• Manufacturer Part Number: adsp-bf548
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
SPECIFICATIONS
Component specifications are subject to change without notice.
OPERATING CONDITIONS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Parameter
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
T
See
V
V
Use of the internal voltage regulator is not supported on automotive grade models. An external voltage regulator must be used.
Bidirectional pins (D15–0, PA15–0, PB14–0, PC15–0, PD15–0, PE15–0, PF15–0, PG15–0, PH13–0, PI15–0, PJ14–0) and input pins (ATAPI_PDIAG, USB_ID, TCK, TDI,
Parameter value applies to all input and bi-directional pins except PB1-0, PE15-14, PG15–11, PH7-6, DQ0-15, and DQS0-1.
Parameter value applies to pins DQ0–15 and DQS0–1.
PB1-0, PE15-14, PG15-11, and PH7-6 are 5.0 V-tolerant (always accept up to 5.5 V maximum V
SDA and SCL are 5.0V tolerant (always accept up to 5.5V maximum V
SDA and SCL are pulled up to V
Parameter value applies to USB_DP, USB_DM, and USB_VBUS pins. See
Parameter value applies to all input and bi-directional pins, except PB1-0, PE15-14, PG15–11, and PH7-6.
Parameter value applies to pins PG15–11 and PH7-6.
Parameter value applies to pins PB1-0 and PE15-14. Consult the I
T
TMS, TRST, CLKIN, RESET, NMI, and BMODE3–0) of the ADSP-BF54x Blackfin processors are 3.3 V-tolerant (always accept up to 3.6 V maximum VIH). Voltage
compliance (on outputs, VOH) is limited by the V
V
J
DDINT
DDEXT
DDUSB
DDMP
DDRTC
DDDDR
DDVR
IH
IHDDR
IH5V
IHTWI
IHUSB
IL
IL5V
ILDDR
ILTWI
DDR_VREF
DDINT
DDEXT
15
j
OH
must be in the range: 0°C < T
Table 13 on Page 35
) is limited by V
13
4
1, 2
3
maximum is 1.10 V during one-time-programmable (OTP) memory programming operations.
minimum is 3.0 V and maximum is 3.6 V during OTP memory programming operations.
Internal Supply Voltage
Internal Supply Voltage
External Supply Voltage
External Supply Voltage
External Supply Voltage
USB External Supply Voltage
MXVR PLL Supply Voltage
MXVR PLL Supply Voltage
Real Time Clock Supply Voltage
Real Time Clock Supply Voltage
DDR1 Memory Supply Voltage
Internal Voltage Regulator
Supply Voltage
High Level Input Voltage
High Level Input Voltage
High Level Input Voltage
High Level Input Voltage
High Level Input Voltage
Low Level Input Voltage
Low Level Input Voltage
Low Level Input Voltage
Low Level Input Voltage
Low Level Input Voltage
DDR_VREF Pin Input Voltage
Junction Temperature
DDEXT
for frequency/voltage specifications.
supply voltage.
j
BUSTWI
< 55°C during OTP memory programming operations.
.
5, 12
13
13
7
9, 14
5, 6
7
8
8, 9, 14
11
DDEXT
supply voltage.
Conditions
Nonautomotive grade models
Automotive grade models
Nonautomotive 3.3 V I/O
Nonautomotive 2.5 V I/O
Automotive grade models
Nonautomotive grade models
Automotive grade models
Nonautomotive grade models
Automotive grade models
V
V
V
V
3.3 V I/O, V
2.5 V I/O, V
V
400-Ball Chip Scale Package Ball
Grid Array (CSP_BGA) @T
–40ºC to +85ºC
DDEXT
DDEXT
DDEXT
DDEXT
DDEXT
Rev. A | Page 34 of 88 | October 2008
2
C specification version 2.1 for the proper resistor value and other open drain pin electrical parameters.
=maximum
=maximum
=maximum
=minimum
=minimum
IH
). Voltage compliance on outputs (V
DDEXT
DDEXT
Absolute Maximum Ratings on Page
=minimum
=minimum
AMBIENT
IH
when power is applied to V
=
Min
0.9
1.0
2.7
2.25
2.7
3.0
0.9
1.0
2.25
2.7
2.5
2.7
2.0
V
2.0
0.7 x V
–0.3
–0.3
–0.3
–0.3
–0.3
0.49 x V
–40
DDR_VREF
OH
) is limited by the
39.
BUSTWI
DDDDR
+ 0.15
10
DDEXT
Nominal Max
3.3
2.5
3.3
3.3
3.3
2.6
3.3
0.50 x
V
VDDEXT
DDDDR
pins). Voltage compliance (on output
supply voltage.
1.43
1.38
3.6
2.75
3.6
3.6
1.43
1.38
3.6
3.6
2.7
3.6
3.6
V
5.5
5.5
5.25
0.6
0.8
0.6
V
0.3 x V
0.51 x V
+105
DDDDR
DDR_VREF
BUSTWI
+ 0.3
DDDDR
– 0.15 V
10
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
ºC
V