adsp-bf548 Analog Devices, Inc., adsp-bf548 Datasheet - Page 57

• Manufacturer Part Number: adsp-bf548
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

Serial Ports Timing
Table 36
through
Table 36. Serial Ports—External Clock
1
2
3
Table 37. Serial Ports—Internal Clock
1
2
Parameter
Timing Requirements
t
t
t
t
t
t
t
Switching Characteristics
t
t
t
t
Parameter
Timing Requirements
t
t
t
t
Switching Characteristics
t
t
t
t
t
Referenced to sample edge.
For serial port receive with external clock and external frame sync only.
Referenced to drive edge.
Referenced to sample edge.
Referenced to drive edge.
SFSE
HFSE
SDRE
HDRE
SCLKEW
SCLKE
RCLKE
DFSE
HOFSE
DDTE
HDTE
SFSI
HFSI
SDRI
HDRI
DFSI
HOFSI
DDTI
HDTI
SCLKIW
Figure 29 on Page 60
through
Table 39 on Page 58
TFSx/RFSx Setup Before TSCLKx/RSCLKx (Externally Generated TFSx/RFSx)
TFSx/RFSx Hold After TSCLKx/RSCLKx (Externally Generated TFSx/RFSx)
Receive Data Setup Before RSCLKx
Receive Data Hold After RSCLKx
TSCLKx/RSCLKx Width
TSCLKx/RSCLKx Period
RSCLKx Period
TFSx/RFSx Delay After TSCLKx/RSCLKx (Internally Generated TFSx/RFSx)
TFSx/RFSx Hold After TSCLKx/RSCLKx (Internally Generated TFSx/RFSx
Transmit Data Delay After TSCLKx
Transmit Data Hold After TSCLKx
TFSx/RFSx Setup Before TSCLKx/RSCLKx (Externally Generated TFSx/RFSx)
TFSx/RFSx Hold After TSCLKx/RSCLKx (Externally Generated TFSx/RFSx)
Receive Data Setup Before RSCLKx
Receive Data Hold After RSCLKx
TFSx/RFSx Delay After TSCLKx/RSCLKx (Internally Generated TFSx/RFSx)
TFSx/RFSx Hold After TSCLKx/RSCLKx (Internally Generated TFSx/RFSx)
Transmit Data Delay After TSCLKx
Transmit Data Hold After TSCLKx
TSCLKx/RSCLKx Width
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
describe serial port operations.
2
and
Figure 28 on Page 59
1
1
Rev. A | Page 57 of 88 | October 2008
3
2
3
2
1
1
3
2
1
1
3
2
1
1
Min
3.0
3.0
3.0
3.0
4.5
15.0
11.1
0.0
0.0
Min
10.0
–1.5
10.0
–1.5
–1.0
–2.0
4.5
Max
10.0
10.0
Max
3.0
3.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns