adsp-bf548 Analog Devices, Inc., adsp-bf548 Datasheet - Page 56

• Manufacturer Part Number: adsp-bf548
• Description: Blackfin Embedded Processor
• Manufacturer: Analog Devices, Inc.

ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
Enhanced Parallel Peripheral Interface Timing
Table 35
peripheral interface operations.
Table 35. Enhanced Parallel Peripheral Interface Timing
Parameter
Timing Requirements
t
t
Timing Requirements - GP Input and Frame Capture Modes
t
t
t
t
Switching Characteristics - GP Output and Frame Capture Modes
t
t
t
t
PCLKW
PCLK
SFSPE
HFSPE
SDRPE
HDRPE
DFSPE
HOFSPE
DDTPE
HDTPE
POLC = 0
PPIx_CLK
PPIx_CLK
POLC = 1
PPIx_FS1
PPIx_FS2
PPIx_DATAx
and
Figure 27 on Page 56
POLS = 1
POLS = 0
POLS = 1
POLS = 0
PPIx_CLK Width
PPIx_CLK Period
External Frame Sync Setup Before PPIx_CLK
External Frame Sync Hold After PPIx_CLK
Receive Data Setup Before PPIx_CLK
Receive Data Hold After PPIx_CLK
Internal Frame Sync Delay After PPIx_CLK
Internal Frame Sync Hold After PPIx_CLK
Transmit Data Delay After PPIx_CLK
Transmit Data Hold After PPIx_CLK
describes enhanced parallel
Figure 27. Enhanced Parallel Peripheral Interface Timing
t
HOFSPE
FRAME
SYNC IS
DRIVEN
OUT
Rev. A | Page 56 of 88 | October 2008
t
DFSPE
t
SDRPE
DATA0
IS
SAMPLED
t
HDRPE
Min
6.0
13.3
0.9
1.9
1.6
1.5
2.4
2.4
Max
10.5
9.9
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns