MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 681

KIT EVAL FOR MPC561/562/563/564

MPC564EVB

Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheets

Specifications of MPC564EVB

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
15.8.4
Freescale Semiconductor
Available on a single SCI channel (SCI1) implemented by the queue transmit enable (QTE) bit set
by software. When enabled, (QTE = 1) the TDRE bit should be ignored by software and the TC bit
is redefined (as described later).
When the queue is disabled (QTE = 0), the SCI functions in single buffer transfer mode where the
queue size is set to one (QTSZ = 0000), and TDRE and TC function as previously defined.
Locations SCTQ[0:15] can be used as general purpose 9-bit registers. All other bits pertaining to
the queue should be ignored by software.
Programmable queue up to 16 transmits (SCTQ[0:15]) which may allow for infinite and
continuous transmits.
Available transmit wrap function to prevent message breaks for transmits greater than 16. This is
achieved by the transmit wrap enable (QTWE) bit. When QTWE is set, the hardware is allowed to
SCI1 Non-Queue Operation
QSCI1 Additional Transmit Operation Features
Queue CONTROL
Transmitter
Baud Rate
Clock
Figure 15-33. Queue Transmitter Block Enhancements
MPC561/MPC563 Reference Manual, Rev. 1.2
Queue STATUS
H (8) 7 6 5 4 3 2 1 0 L
SC1DR Tx Buffer
10 (11) - Bit
Tx Shift Register
Queue Control
Logic
4-bits
SCI Interrupt Request
SCTQ0
SCTQ1
SCTQ15
Queued Serial Multi-Channel Module
TxD
Data bus
15-63

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