MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 288
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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System Configuration and Protection
6.2.2.5.3
Table 6-26
6-48
1
HRESET
HRESET
22:23
24:31
Bits
8:15
0:7
Field
Field GDDR
16
17
18
19
20
21
Addr
describes the bit values for data direction control.
MSB
SDDRC[0:7]
16
0
0
SGPIO Control Register (SGPIOCR)
GDDR0
GDDR1
GDDR2
GDDR3
GDDR4
GDDR5
SDDRD
[24:31]
Name
—
—
GDDR
17
1
1
Group data direction for SGPIOD[0:7]
Group data direction for SGPIOD[8:15]
SGPIO data direction for SGPIOC[0:7]. Each SDDR bit zero to seven controls the direction
of the corresponding SGPIOC pin zero to seven
Reserved
Group data direction for SGPIOD[16:23]
Group data direction for SGPIOA[8:15]
Group data direction for SGPIOA[16:23]
Group data direction for SGPIOA[24:31]
Reserved
SGPIO data direction for SGPIOD[24:31]. Each SDDRD bits 24:31 controls the direction
of the corresponding SGPIOD pin [24:31].
GDDR
18
Figure 6-43. SGPIO Control Register (SGPIOCR)
2
2
SDDR/GDDR
MPC561/MPC563 Reference Manual, Rev. 1.2
SDDRC[0:7]
Table 6-25. SGPIOCR Bit Descriptions
GDDR
19
Table 6-26. Data Direction Control
3
3
0
1
GDDR
20
4
4
0000_0000_0000_0000
0000_0000_0000_0000
GDDR
SGPIO configured as output
SGPIO configured as input
21
5
5
0x2F C02C
Operation
22
6
Description
—
23
7
24
8
25
9
10
26
SDDRD[24:31]
11
27
—
Freescale Semiconductor
12
28
13
29
14
30
LSB
15
31
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