MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 1154
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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TPU3 ROM Functions
these entry tables the RCPU selects. Though the TPU3 can access either entry table, only one table can be
used at a time and functions from the tables cannot be mixed. The default entry table, located in bank 0, is
identical to the standard microcode ROM in the TPU2, making any RCPU code written for the TPU2
interchangable with the TPU3. The functions in the default entry table in bank 0 are listed in
The functions in the bank 1 entry table are identical to those in bank 0, except in three cases. Function 1,
SPWM in the bank 0 table, has been replaced by RWTPIN, a function that allows a read and write to the
TPU3 timebases and corresponding pin. Function 5, PPWA in the bank 0 table, is an identification (ID)
function in the bank 1 table that provides the microcode ROM revision number. Function 7, MCPWM, has
been replaced by MULTI in later silicon revisions. The functions in the bank 1 entry table are listed in
Table
The RCPU selects which entry table to use by setting the ETBANK field in the TPUMCR2 register. This
register is written once after reset. Although one entry table is specified at start-up, in some cases it is
possible to use functions from both tables without resetting the microcontroller. A customer may, for
example, wish to use the ID function from bank 1 to verify the TPU3 microcode version but then use the
MCPWM function from bank 0. As a customer will typically only run the ID function during system
D-2
1
The MULTI functions are only on revision D and later of the MPC561 and not available on revision B and earlier of
the MPC563.
D-1.
Function
Number
0xD
0xC
0xF
0xE
0xB
0xA
9
8
7
6
5
4
3
2
1
0
MCPWM (Multi-Channel Pulse Width Modulation)
SPWM (Synchronized Pulse Width Modulation)
NITC (New Input Capture/Input Transition
PPWA (Period/Pulse Width Accumulator)
COMM (Multiphase Motor Commutation)
PTA (Programmable Time Accumulator)
FQM (Frequency Measurement)
UART (Universal Asynchronous
FQD (Fast Quadrature Decode)
PWM (Pulse Width Modulation)
SIOP (Serial Input/Output Port)
QOM (Queued Output Match)
Bank 0 Functions (Default)
HALLD (Hall Effect Decode)
DIO (Discrete Input/Output)
TSM (Table Stepper Motor)
OC (Output Compare)
Receiver/Transmitter)
Table D-1. Bank 0 and Bank 1 Functions
MPC561/MPC563 Reference Manual, Rev. 1.2
Counter)
NITC (New Input Capture/Input Transition
COMM (Multiphase Motor Commutation)
PTA (Programmable Time Accumulator)
RWTPIN (Read/Write Timers and Pin)
FQM (Frequency Measurement)
UART (Universal Asynchronous
FQD (Fast Quadrature Decode)
PWM (Pulse Width Modulation)
SIOP (Serial Input/Output Port)
QOM (Queued Output Match)
HALLD (Hall Effect Decode)
DIO (Discrete Input/Output)
TSM (Table Stepper Motor)
OC (Output Compare)
Receiver/Transmitter)
MULTI (Multi TPU)
Bank 1 Functions
ID (Identification)
Counter)
Freescale Semiconductor
1
Table
D-1.
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