MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 617
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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The current into the signal (I
equations:
where:
The current into (I
parasitic bipolar transistor (K
where I
A method for minimizing the impact of stress conditions on the QADC64E is to strategically allocate
QADC64E inputs so that the lower accuracy inputs are adjacent to the inputs most likely to see stress
conditions.
Also, suitable source impedances should be selected to meet design goals and minimize the effect of stress
conditions.
Freescale Semiconductor
INJ
is either I
I
IN
V
V
(refer to V
V
(refer to V
R
(10-kΩ resistor in
R
= - K
STRESS
SELECTED
STRESS
EB
BE
IN
N
= Parasitic NPN base/emitter voltage
= Parasitic PNP emitter/base voltage
INJN
) the neighboring signal is determined by the K
* I
INJ
= Source impedance
= Adjustable voltage source
or I
NEGCLAMP
NEGCLAMP
Figure 14-53. Input Signal Subjected to Positive Stress
= Source impedance on channel selected for conversion
V
INJP
IN
INJN
N
V
.
<< 1). The I
STRESS
or I
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 14-52
I INJP
in
in
+
I INJN
INJP
Appendix F, “Electrical
Appendix F, “Electrical
) under negative or positive stress is determined by the following
=
=
R
R
V STRESS V EB
--------------------------------------------------------------------- -
–
----------------------------------------------------- -
SELECTED
IN
STRESS
(
10K
V STRESS V BE
can be expressed by the following equation:
and
R STRESS
R STRESS
I
INJP
I
IN
Figure 14-53
–
PARASITIC
–
AN
AN
DEVICE
n+1
n
–
V DDA
)
Signal Under
Adjacent
Signal
Characteristics”)
Characteristics”))
Stress
on stressed channel)
N
(current coupling ratio) of the
V
DDA
QADC64E Enhanced Mode Operation
QADC64E PAR
Eqn. 14-1
Eqn. 14-2
14-75
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