MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 6
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 6 of 1420
- Download datasheet (11Mb)
3.13.3
3.13.4
3.13.5
3.13.6
3.13.7
3.13.7.1
3.13.7.2
3.13.8
3.13.8.1
3.13.9
3.13.9.1
3.13.9.2
3.13.10
3.13.10.1
3.13.10.2
3.13.10.3
3.13.10.4
3.13.10.5
3.13.10.6
3.13.10.7
3.13.10.8
3.14
3.14.1
3.14.2
3.14.3
3.14.4
3.14.5
3.14.6
3.15
3.15.1
3.15.1.1
3.15.1.2
3.15.2
3.15.2.1
3.15.3
3.15.4
3.15.4.1
3.15.4.2
3.15.4.3
3.15.4.4
3.15.4.5
Freescale Semiconductor
Paragraph
Number
Virtual Environment Architecture (VEA) .................................................................... 3-43
Operating Environment Architecture (OEA) ................................................................ 3-44
Classes of Instructions .............................................................................................. 3-40
Exceptions ................................................................................................................. 3-40
Branch Processor ...................................................................................................... 3-40
Instruction Fetching .................................................................................................. 3-40
Branch Instructions ................................................................................................... 3-40
Fixed-Point Processor ............................................................................................... 3-41
Floating-Point Processor ........................................................................................... 3-41
Load/Store Processor ................................................................................................ 3-42
Atomic Update Primitives ........................................................................................ 3-43
Effect of Operand Placement on Performance ......................................................... 3-43
Storage Control Instructions ..................................................................................... 3-43
Instruction Synchronize (isync) Instruction .............................................................. 3-43
Enforce In-Order Execution of I/O (eieio) Instruction ............................................. 3-44
Time Base ................................................................................................................. 3-44
Branch Processor Registers ...................................................................................... 3-44
Fixed-Point Processor ............................................................................................... 3-44
Storage Control Instructions ..................................................................................... 3-45
Exceptions ................................................................................................................. 3-45
Invalid Branch Instruction Forms ......................................................................... 3-40
Branch Prediction ................................................................................................. 3-40
Fixed-Point Instructions ........................................................................................ 3-41
General .................................................................................................................. 3-41
Optional Instructions ............................................................................................ 3-41
Fixed-Point Load with Update and Store with Update Instructions ..................... 3-42
Fixed-Point Load and Store Multiple Instructions ............................................... 3-42
Fixed-Point Load String Instructions .................................................................... 3-42
Storage Synchronization Instructions ................................................................... 3-42
Floating-Point Load and Store With Update Instructions .................................... 3-42
Floating-Point Load Single Instructions ............................................................... 3-42
Floating-Point Store Single Instructions ............................................................... 3-42
Optional Instructions ............................................................................................ 3-43
Machine State Register (MSR) ............................................................................. 3-44
Branch Processors Instructions ............................................................................. 3-44
Special Purpose Registers ..................................................................................... 3-44
System Reset Exception and NMI (0x0100) ........................................................ 3-45
Machine Check Exception (0x0200) .................................................................... 3-46
Data Storage Exception (0x0300) ......................................................................... 3-48
Instruction Storage Exception (0x0400) ............................................................... 3-48
External Interrupt (0x0500) .................................................................................. 3-48
MPC561/MPC563 Reference Manual, Rev. 1.2
Contents
Title
Number
Page
vi
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