MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 599

• Manufacturer Part Number: MPC564EVB
• Description: KIT EVAL FOR MPC561/562/563/564
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC564EVB

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC56x
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet
• For Use With/related Products: MPC561, 562, 563, 564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The remaining situations, S6 through S11, show the impact of a queue 1 trigger event occurring during
queue 2 execution. Queue 1 is higher in priority the conversion taking place in queue 2 is aborted, so that
there is not a variable latency time in responding to queue 1 trigger events.
In situation S6
before the conversion is complete, so that queue 1 execution can begin. Queue 2 is considered suspended.
After queue 1 is finished, queue 2 starts over with the first CCW, when the RES (resume) control bit is set
to 0. Situation S7
suspension works the same way.
Freescale Semiconductor
Q1
Q2
QS
Q1
Q2
QS
(Figure
(Figure
IDLE
IDLE
0000
0000
IDLE
IDLE
14-30), the conversion initiated by the second CCW in queue 2 is aborted just
14-31) shows that when pause operation is not in use with queue 2, queue 2
Q1:
Q1:
Q2:
T1
T1
1000
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 14-29. CCW Priority Situation 5
Figure 14-30. CCW Priority Situation 6
C1
ACTIVE
C1
ACTIVE
T2
1000
TOR2
TRIG
1011
C2
T2
C2
PF1
PF1
0100
C1
Q2:
ACTIVE
0110
PAUSE
T2
PAUSE
C2
C1
ACTIVE
PF2
0110
0101 1001 1011
C2
PAUSE
T1
T1
SUSPEND
C3
ACTIVE
ACTIVE
C3
ACTIVE
ACTIVE
1010
T2
TRIG
TOR2
C4
T2
C4
CF1
CF1
C3
ACTIVE
C1
0010
C4
C2
QADC64E Enhanced Mode Operation
RESUME=0
ACTIVE
0010
CF2
C3
IDLE
IDLE
C4
IDLE
0000
CF2
IDLE
0000
QADC S5
QADC S6
14-57