MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 13
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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9.5.12
9.5.13
9.5.14
10.1
10.2
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
10.2.6
10.2.6.1
10.2.6.2
10.2.6.3
10.3
10.3.1
10.3.2
10.3.3
10.3.4
10.3.5
10.4
10.5
10.6
10.7
10.8
10.9
10.9.1
10.9.2
10.9.3
10.9.4
10.9.5
10.9.6
Freescale Semiconductor
Paragraph
Number
Overview ....................................................................................................................... 10-1
Memory Controller Architecture .................................................................................. 10-3
Chip-Select Timing ..................................................................................................... 10-10
Write and Byte Enable Signals ................................................................................... 10-24
Dual Mapping of the Internal Flash EEPROM Array ................................................ 10-24
Dual Mapping of an External Flash Region ............................................................... 10-26
Global (Boot) Chip-Select Operation ......................................................................... 10-27
Memory Controller External Master Support ............................................................. 10-28
Programming Model ................................................................................................... 10-31
Bus Operation in External Master Modes ................................................................. 9-49
Contention Resolution on External Bus .................................................................... 9-53
Show Cycle Transactions .......................................................................................... 9-55
Associated Registers ................................................................................................. 10-4
Port Size Configuration ............................................................................................ 10-4
Write-Protect Configuration ..................................................................................... 10-5
Address and Address Space Checking ...................................................................... 10-5
Burst Support ............................................................................................................ 10-5
Reduced Data Setup Time ........................................................................................ 10-6
Memory Devices Interface Example ...................................................................... 10-12
Peripheral Devices Interface Example .................................................................... 10-13
Relaxed Timing Examples ...................................................................................... 10-14
Extended Hold Time on Read Accesses ................................................................. 10-18
Summary of GPCM Timing Options ...................................................................... 10-22
General Memory Controller Programming Notes .................................................. 10-31
Memory Controller Status Registers (MSTAT) ..................................................... 10-32
Memory Controller Base Registers (BR0–BR3) .................................................... 10-32
Memory Controller Option Registers (OR0–OR3) ................................................ 10-34
Dual-Mapping Base Register (DMBR) .................................................................. 10-36
Dual-Mapping Option Register (DMOR) ............................................................... 10-37
Case 1: Normal Setup Time .................................................................................. 10-6
Case 2: Short Setup Time ..................................................................................... 10-7
Summary of Short Setup Time ............................................................................. 10-8
MPC561/MPC563 Reference Manual, Rev. 1.2
Memory Controller
Contents
Chapter 10
Title
Number
Page
xiii
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