MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 1007

• Manufacturer Part Number: MPC564EVB
• Description: KIT EVAL FOR MPC561/562/563/564
• Manufacturer: Freescale Semiconductor
• Type: Microcontrollerr

Specifications of MPC564EVB

• Contents: Module Board, Installation Guide, Power Supply, Cable, Software and more
• Processor To Be Evaluated: MPC56x
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet
• For Use With/related Products: MPC561, 562, 563, 564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

24.8.2.2
Indirect branches include interrupts, exceptions, and all taken branches whose destination is determined at
run time. For the RCPU, certain sequential instructions are tagged with the indirect change-of-flow
attribute because these instruction affect the machine in a similar manner to true indirect change-of-flow
instructions. These instructions are the rfi, isync, mtmsr and certain mtspr (to CMPA – CMPF, ICTRL,
ECR and DER)
The program trace indirect branch message has the following format:
For compressed code support, six additional bits indicate the starting bit address within the word of the
compressed instruction.
The program trace indirect branch with compressed code message has the format shown in
The format of the bit address field is shown in
Freescale Semiconductor
[6 bits]
TCODE (59)
RCPU
Bits
4:5
0:3
Indirect Branch Messages
On the MPC562/MPC564, the bit pointer should be multiplied by 2 (shift
left on bit) for the actual starting bit position.
MSB
[6 bits]
Figure 24-21. Indirect Branch Message Format with Compressed Code
5
TCODE (4)
Figure 24-22. Bit Pointer Format with Compressed Code
[1-8 bits]
Sequence Count
Nexus
Bits
0:1
2:5
Figure 24-20. Indirect Branch Message Format
4
MPC561/MPC563 Reference Manual, Rev. 1.2
Sequence Count
Max Length = 40 bits
Min Length = 14 bits
Table 24-26. Bit Pointer Format
Bit Pointer
Max Length = 37 bits
Min Length = 8 bits
[1 - 8 bits]
3
Name
BP
Figure
—
NOTE
[6 bits]
Bit Pointer
24-22. The bit definitions are shown in
2
Reserved (Unused)
Bit pointer. This value is 1/2 of the actual bit position on
which the instruction starts.
Relative Address
[1 - 23 bits]
1
[1-23 bits]
Reserved
Relative Address
Description
LSB
0
Figure
Table
READI Module
24-21.
24-26.
24-39