MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 230

KIT EVAL FOR MPC561/562/563/564

MPC564EVB

Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Datasheets

Specifications of MPC564EVB

Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Burst Buffer Controller 2 Module
4-24
1
20:21
22:24
26:27
29:31
This field is available only on the MPC562/MPC564.
Bits
4:19
25
28
0
1
2
3
BTBINH
CMPR
Name
ENR0
ENR1
ENR2
ENR3
The MI_GRA register should be programmed to enable fetch access (PP and
G bits) before RCPU MSR[IR] is set.
PP
G
1
Enable IMPU Region 0
0 Region 0 is off.
1 Region 0 is on.
Enable IMPU Region 1
0 Region 1 is off.
1 Region 1 is on.
Enable IMPU Region 2
0 Region 2 is off.
1 Region 2 is on.
Enable IMPU Region 3
0 Region 3 is off.
1 Region 3 is on.
Reserved
Protection Bits
00 Supervisor – No Access, User – No Access.
01 Supervisor – Fetch, User – No Access.
1x Supervisor – Fetch, User – Fetch.
Reserved
Guard attribute for region
0 Fetch is not prohibited from region. Region is not guarded.
1 Fetch is prohibited from guarded region. An exception will occur under such attempt.
Compressed Region.
x0 The region is not restricted
01 Region is considered a non-compressed code region Access to the region is allowed only in
11 Region is considered a compressed code region. Access to the region is allowed only in
BTB Inhibit region
0 BTB operation is not prohibited for current memory region
1 BTB operation is prohibited for current memory region.
Reserved
“Decompression Off” mode
“Decompression On” mode
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 4-8. MI_GRA Field Descriptions
NOTE
Description
Freescale Semiconductor

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