MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 317
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 317 of 1420
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Freescale Semiconductor
buclk_enable = (STBUC | LOC) and LME lock indicates loss of lock status
bit (LOCS) for all cases and loss of clock sticky bit (LOCSS) when state 3
is active. When buclk_enable is changed, the chip asserts HRESET to
switch the system clock to BUCLK or PLL.
At PORESET negation, if the PLL is not locked, the loss-of-clock sticky bit
(LOCSS) is asserted, and the chip should operate with BUCLK.
buclk_enable = 1
& hreset_b = 0
else
3,BUCLK
6,BULCK
Figure 8-8. Clock Source Switching Flow Chart
MPC561/MPC563 Reference Manual, Rev. 1.2
poreset_b = 1
LME = 1
buclk_enable=0
& hreset_b=0
buclk_enable = 1
& hreset_b = 0
1,BUCLK
2,BUCLK
NOTE
else
5, osc
4, osc
LME = 0
buclk_enable = 0
& hreset_b = 0
hreset_b = 0
else
LOCS=0
Clocks and Power Control
8-15
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