MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 135
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Freescale Semiconductor
SGPIOC6
Signal List
SGPIOC7
VFLS[0:1]
IWP[0:1]
IRQOUT /
BB
LWP1
DSCK /
IWP2
IWP3
DSDI /
VF0
VF1
VF2
LWP0
TMS /
FRZ /
BG
TCK /
MCKI
BR
MDI0
EVTI
TDI /
PTR
7, 12
7
7
7
7
7
/
/
/
/
7
/
7
7
/
7
3
3
/
7
1
/
/
Voltage
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
2.6 V
5 V
5 V
Table 2-14. MPC561/MPC563 Signal Reset State (continued)
Controlled
Slew Rate
Option?
Yes
Yes
MPC561/MPC563 Reference Manual, Rev. 1.2
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
50 ; 50
50 ; 50
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
50 ; 25
Drive
Load
(pF)
NA
NA
NA
NA
NA
NA
NA
NA
JTAG/BDM/READI
2
5
5
PD until PRDS
is set
PD until reset
negates
PD until reset
negates
PD until PRDS
is set
PD until reset
negates
PD until reset
negates
PU2.6 when
driver not
enabled or until
SPRDS is set
PU2.6 when
driver not
enabled or until
SPRDS is set
PU2.6 when
driver not
enabled or until
SPRDS is set
PU2.6 until reset
negates
PU2.6 if in JTAG
mode, otherwise
PD until SPRDS
is set
PU2.6 if in JTAG
mode, otherwise
PD until SPRDS
is set
PD until reset
negates
Reset State
14
6
6
6
6
Hysteresi
Enabled?
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
s
PTR
LWP0
Controlled by DBGC in reset
config word. See
Controlled by DBGC in reset
config word. See
Controlled by DBGC in reset
config word. See
Controlled by DBGC in the
reset config word. See
Table
TMS unless the Nexus
(READI) port is enabled, then
EVTI. See
DSDI unless the Nexus
(READI) port (MDI0) or JTAG
mode (TDI) is enabled. See
Section
DSCK unless the Nexus
(READI) port (MCKI) or JTAG
mode (TCK) is enabled. See
Section
Function After HRESET,
6-8.
PORESET/TRST
2.5.
2.5.
Section
Signal Descriptions
Table
Table
Table
2.5.
6-8.
6-8.
6-8.
2-37
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