MPC564EVB Freescale Semiconductor, MPC564EVB Datasheet - Page 355
![KIT EVAL FOR MPC561/562/563/564](/photos/39/39/393946/mpc564evbimage_sml.jpg)
MPC564EVB
Manufacturer Part Number
MPC564EVB
Description
KIT EVAL FOR MPC561/562/563/564
Manufacturer
Freescale Semiconductor
Type
Microcontrollerr
Specifications of MPC564EVB
Contents
Module Board, Installation Guide, Power Supply, Cable, Software and more
Processor To Be Evaluated
MPC56x
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet
For Use With/related Products
MPC561, 562, 563, 564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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1. For an illustration of device connections on the data bus, see
9.5.3
Pre-discharge mode is provided for applications that use 3.3-V/5-V external memories while the
MPC561/MPC563 data bus pads are optimized to 2.6-V memories, and cannot tolerate more than 3.1 V.
When connecting 3.3-V devices to the E-bus, and performing read and write operations, this mode should
be invoked in order to avoid long term reliability issues of the data pads.
When the PDMCR2[PREDIS_EN] bit is set, the MPC561/MPC563 will discharge the bus during the
address phase of any write cycle prior to the data phase. The data bus will be discharged from up to 5 V to
a level which is suitable to the low voltage drivers. In most cases, the ORx[EHTR] bit of the relevant
memory bank, should be set along with the PREDIS_EN bit in order to reserve sufficient time for the
Freescale Semiconductor
CLKOUT
BR
BG
BB
ADDR[0:1]
RD/WR
TSIZ[0:1]
BURST, BDIP
TS
STS
Data
TA
1
Data Bus Pre-Discharge Mode
Figure 9-10. Single Beat 32-Bit Data Write Cycle Timing — 16-Bit Port Size
MPC561/MPC563 Reference Manual, Rev. 1.2
ADDR
00
ABCDEFGH
Figure
9-23.
10
ADDR + 2
EFGHEFGH
External Bus Interface
9-15
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