AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 998
![KIT EVAL FOR AT91SAM9G45](/photos/9/26/92642/at91sam9g45-ekes_sml.jpg)
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
- Current page: 998 of 1218
- Download datasheet (19Mb)
Figure 41-14. DMAC Transfer Replay Mode is Enabled for the Source and Contiguous Destination Address
41.4.5.7
6438F–ATARM–21-Jun-10
Multi-buffer DMAC Transfer with Linked List for Source and Contiguous Destination Address (Row 2)
Buffer Transfer Complete
interrupt generated here
1. Read the Channel Enable register to choose a free (disabled) channel.
2. Set up the linked list in memory. Write the control information in the
LLI.DMAC_CTRLAx and LLI.DMAC_CTRLBx register location of the buffer descriptor
for each LLI in memory for channel x. For example, in the register, you can program the
following:
a. Set up the transfer type (memory or non-memory peripheral for source and desti-
b. Set up the transfer characteristics, such as:
– i. Transfer width for the source in the SRC_WIDTH field.
– ii. Transfer width for the destination in the DST_WIDTH field.
– iii. Source AHB master interface layer in the SIF field where source resides.
– iv. Destination AHB master interface layer in the DIF field where destination resides.
Channel Disabled by
nation) and flow control device by programming the FC of the DMAC_CTRLBx
register.
Buffer Complete interrupt
hardware
generated here
yes
Contiguous mode for DADDRx
HDMA State Machine Table?
Replay mode for SADDRx,
Stall until STALLED field is
cleared by software writing
DMA_EBCIMR[x]=1?
Channel Enabled by
Is HDMA in Row1of
CTRLAx, CTRLBx
KEEPON Field
Buffer Transfer
software
no
yes
AT91SAM9G45
no
998
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