AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 43
![KIT EVAL FOR AT91SAM9G45](/photos/9/26/92642/at91sam9g45-ekes_sml.jpg)
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
- Current page: 43 of 1218
- Download datasheet (19Mb)
9.5.1
• CRm[3:0]: Specified Coprocessor Action
Determines specific coprocessor action. Its value is dependent on the CP15 register used. For details, refer to CP15 spe-
cific register behavior.
• opcode_2[7:5]
Determines specific coprocessor operation code. By default, set to 0.
• Rd[15:12]: ARM Register
Defines the ARM register whose value is transferred to the coprocessor. If R15 is chosen, the result is unpredictable.
• CRn[19:16]: Coprocessor Register
Determines the destination coprocessor register.
• L: Instruction Bit
0 = MCR instruction
1 = MRC instruction
• opcode_1[23:20]: Coprocessor Code
Defines the coprocessor specific code. Value is c15 for CP15.
• cond [31:28]: Condition
For more details, see Chapter 2 in ARM926EJ-S TRM.
6438F–ATARM–21-Jun-10
31
23
15
7
CP15 Registers Access
opcode_1
opcode_2
30
22
14
6
CP15 registers can only be accessed in privileged mode by:
Other instructions like CDP, LDC, STC can cause an undefined instruction exception.
The assembler code for these instructions is:
The MCR, MRC instructions bit pattern is shown below:
• MCR (Move to Coprocessor from ARM Register) instruction is used to write an ARM register
• MRC (Move to ARM Register from Coprocessor) instruction is used to read the value of
cond
Rd
to CP15.
CP15 to an ARM register.
MCR/MRC{cond} p15, opcode_1, Rd, CRn, CRm, opcode_2.
29
21
13
5
28
20
12
L
4
1
27
19
11
1
1
3
26
18
10
1
1
2
CRm
CRn
AT91SAM9G45
25
17
1
1
9
1
24
16
0
1
8
0
43
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