AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 598
![KIT EVAL FOR AT91SAM9G45](/photos/9/26/92642/at91sam9g45-ekes_sml.jpg)
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
- Current page: 598 of 1218
- Download datasheet (19Mb)
33.7.8
33.7.8.1
33.7.8.2
33.7.8.3
33.7.8.4
6438F–ATARM–21-Jun-10
LIN Mode
Modes of operation
Receiver and Transmitter Control
Character Transmission
Character Reception
The LIN Mode provides Master node and Slave node connectivity on a LIN bus.
The LIN (Local Interconnect Network) is a serial communication protocol which efficiently sup-
ports the control of mechatronic nodes in distributed automotive applications.
The main properties of the LIN bus are:
LIN provides cost efficient bus communication where the bandwidth and versatility of CAN are
not required.
The LIN Mode enables processing LIN frames with a minimum of action from the
microprocessor.
The USART can act either as a LIN Master node or as a LIN Slave node.
The node configuration is chosen by setting the USART_MODE field in the USART3 Mode reg-
ister (US_MR):
In order to avoid unpredicted behavior, any change of the LIN node configuration must be fol-
lowed by a software reset of the transmitter and of the receiver (except the initial node
configuration after a hardware reset). (See
See “Receiver and Transmitter Control” on page 570.
See “Transmitter Operations” on page 570.
See “Receiver Operations” on page 579.
• Single Master/Multiple Slaves concept
• Low cost silicon implementation based on common UART/SCI interface hardware, an
• Self synchronization without quartz or ceramic resonator in the slave nodes
• Deterministic signal transmission
• Low cost single-wire implementation
• Speed up to 20 kbit/s
• LIN Master Node (USART_MODE=0xA)
• LIN Slave Node (USART_MODE=0xB)
equivalent in software, or as a pure state machine.
Section
33.7.8.2)
AT91SAM9G45
598
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