AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 843
AT91SAM9G45-EKES
Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr
Datasheets
1.AT91SAM9G45-EKES.pdf
(56 pages)
2.AT91SAM9G45-EKES.pdf
(1218 pages)
3.AT91SAM9G45-EKES.pdf
(66 pages)
Specifications of AT91SAM9G45-EKES
Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
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- Download datasheet (19Mb)
Figure 38-13. Data OUT Transfer for Endpoint with One Bank
843
USB Bus
Packets
RX_BK_RDY
(UDPHS_EPTSTAx)
FIFO (DPR)
Content
AT91SAM9G45
Token OUT
Host Sends Data Payload
Written by UDPHS Device
Data OUT 1
Data OUT 1
For OUT transfer, the bank will be automatically cleared by hardware when the application has
read all the bytes in the bank (the bank is empty).
Note: When a zero-length-packet is received, RX_BK_RDY bit in UDPHS_EPTSTAx is cleared
automatically by AUTO_VALID, and the application knows of the end of buffer by the presence
of the END_TR_IT.
Note: If the host sends a zero-length packet, and the endpoint is free, then the device sends an
ACK. No data is written in the endpoint, the RX_BY_RDY interrupt is generated, and the
BYTE_COUNT field in UDPHS_EPTSTAx is null.
– END_BUFFIT: Generate an interrupt when BUFF_COUNT in the
– END_TR_EN: End of transfer enable, the UDPHS device can put an end to the
– END_TR_IT: End of transfer interrupt enable, an interrupt is sent after the last USB
– CHANN_ENB: Run and stop at end of buffer.
UDPHS_DMASTATUSx register reaches 0.
current DMA transfer, in case of a short packet.
packet has been transferred by the DMA, if the USB transfer ended with a short
packet. (Beneficial when the receive size is unknown.)
Host Sends the Next Data Payload
ACK
Microcontroller Read
Set by Hardware
Microcontroller Transfers Data
Data OUT 1
Token OUT
Interrupt Pending
Data OUT 2
NAK
Cleared by Firmware,
Data Payload Written in FIFO
Token OUT
Host Resends the Next Data Payload
Written by UDPHS Device
Data OUT 2
Data OUT 2
6438F–ATARM–21-Jun-10
ACK
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