AT91SAM9G45-EKES Atmel, AT91SAM9G45-EKES Datasheet - Page 767

KIT EVAL FOR AT91SAM9G45

AT91SAM9G45-EKES

Manufacturer Part Number
AT91SAM9G45-EKES
Description
KIT EVAL FOR AT91SAM9G45
Manufacturer
Atmel
Series
AT91SAM Smart ARMr
Type
MCUr

Specifications of AT91SAM9G45-EKES

Contents
Board
Processor To Be Evaluated
SAM9G45
Data Bus Width
32 bit
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
1.8 V to 3.3 V
For Use With/related Products
AT91SAM9G45
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q4626953
6438F–ATARM–21-Jun-10
Table 36-7.
The HSMCI_ARGR contains the argument field of the command.
To send a command, the user must perform the following steps:
The command is sent immediately after writing the command register.
As soon as the command register is written, then the status bit CMDRDY in the status register
(HSMCI_SR) is cleared.
It is released and the end of the card response.
If the command requires a response, it can be read in the HSMCI response register
(HSMCI_RSPR). The response size can be from 48 bits up to 136 bits depending on the com-
mand. The HSMCI embeds an error detection to prevent any corrupted data during the transfer.
The following flowchart shows how to send a command to the card and read the response if
needed. In this example, the status register bits are polled but setting the appropriate bits in the
interrupt enable register (HSMCI_IER) allows using an interrupt method.
Field
TRCMD (transfer command)
TRDIR (transfer direction)
TRTYP (transfer type)
IOSPCMD (SDIO special command)
• Fill the argument register (HSMCI_ARGR) with the command argument.
• Set the command register (HSMCI_CMDR) (see
Fields and Values for HSMCI_CMDR Command Register
Value
0 (No transfer)
X (available only in transfer command)
X (available only in transfer command)
0 (not a special command)
Table
36-7).
AT91SAM9G45
767

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