AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 69

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

The following figure illustrates the relationship between
the initialization base address, the initialization block,
the receive and transmit descriptor ring base
Polling
If there is no network channel activity and there is no
pre- or post-receive or pre- or post-transmit activity be-
ing performed by the PCnet-PCI II controller, then the
PCnet-PCI II controller will periodically poll the current
receive and transmit descriptor entries in order to ascer-
tain their ownership. If the DPOLL bit in CSR4 is set,
then the transmit polling function is disabled.
A typical polling operation consists of the following: The
PCnet-PCI II controller will use the current receive de-
scriptor address stored internally to vector to the
TLE RES RLE RES
IADR[31:16]
CSR2
RES
Initialization
LADRF[63:32]
LADRF[31:0]
RDRA[31:0]
TDRA[31:0]
PADR[31:0]
Block
PADR[47:32]
IADR[15:0]
CSR1
MODE
Figure 33. 32-bit Software Model
P R E L I M I N A R Y
Am79C970A
Buff
Buff
Xmt
Rcv
addresses, the receive and transmit descriptors and the
receive and transmit data buffers, when SSIZE32 is set
to ONE.
appropriate Receive Descriptor Table Entry (RDTE). It
will then use the current transmit descriptor address
(stored internally) to vector to the appropriate Transmit
Descriptor Table Entry (TDTE). The accesses will be
made in the following order: RMD1, then RMD0 of the
current RDTE during one bus arbitration, and after that,
TMD1, then TMD0 of the current TDTE during a second
bus arbitration. All information collected during polling
activity will be stored internally in the appropriate CSRs,
if the OWN bit is set. (i.e. CSR18, CSR19, CSR20,
CSR21, CSR40, CSR42, CSR50, CSR52).
1st
desc.
start
RMD
1st
desc.
start
TMD0
Buffer
Buffer
Data
Data
1
1
RMD
Rcv Descriptor
N
TMD1 TMD2 TMD3
Xmt Descriptor
M
Ring
RMD
Ring
Buffer
Buffer
N
Data
Data
2
2
M
RMD
N
M
2nd
desc.
start
2nd
desc.
start
RMD
N
TMD0
M
•
Buffer
Buffer
Data
Data
•
•
M
N
•
•
•
19436A-36
AMD
69