AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 60

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

The settings of SWSTYLE (BCR20, bits 7–0) and
BWRITE (BCR18, bit 5) affect the way the PCnet-PCI II
controller performs descriptor write operations.
When SWSTYLE is set to ZERO, ONE or TWO, all
descriptor write operations are performed in non-burst
mode. The setting of BWRITE has no effect in
this configuration.
When SWSTYLE is set to THREE, the descriptor entries
are ordered to allow burst transfers. The PCnet-PCI II
controller will perform all descriptor write operations in
burst mode, if BWRITE is set to ONE.
A write transaction to the descriptor ring entries is the
only case where the PCnet-PCI II controller inserts a
wait state when being the bus master. Every data phase
in non-burst and burst mode is extended by one clock
cycle, during which IRDY is deasserted.
60
AMD
DEVSEL
FRAME
TRDY
IRDY
C/BE
REQ
GNT
PAR
CLK
AD
Figure 27. Descriptor Ring Read In Burst Mode
1
DEVSEL is sampled
2
P R E L I M I N A R Y
MD1
0110
Am79C970A
3
PAR
BCR20[7:0] BCR18[5]
4
SWSTYLE
1,2
0000
DATA
0
3
3
Table 5. Descriptor Write Sequence
5
DATA
BWRITE
PAR
6
X
X
0
1
PAR
7
AD Bus Sequence
Address = XXXX XX04h
Data = MD2[15:0], MD1[15:0]
Idle
Address = XXXX XX00h
Data = MD1[31:24]
Address = XXXX XX08h
Data = MD2[31:0]
Idle
Address = XXXX XX04h
Data = MD1[31:16]
Address = XXXX XX00h
Data = MD2[31:0]
Idle
Address = XXXX XX04h
Data = MD1[31:16]
Address = XXXX XX00h
Data = MD2[31:0]
Data = MD1[31:16]
19436A-30