AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 158

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

158
SWSTYLE
All Other
[7:0]
00h
01h
02h
03h
AMD
PCnet-PCI II
Style Name CSRPCNET
PCnet-PCI
PCnet-ISA
Undefined
C-LANCE
Controller
ILACC
/
PCnet-PCI II controller utilizes
32-bit software structures for the
initialization block and the trans-
mit and receive descriptor en-
tries. When cleared, this bit
indicates that the PCnet-PCI II
controller utilizes 16-bit software
structures for the initialization
block and the transmit and
receive descriptor entries. In this
mode the PCnet-PCI II controller
is backwards compatible with
the Am79C90 C-LANCE and
Am79C960 PCnet-ISA.
The value of SSIZE32 is deter-
mined by the PCnet-PCI II con-
troller according to the setting of
the Software Style (SWSTYLE,
bits 7–0 of this register).
Read
SSIZE32 is read only. Write op-
erations
SSIZE32 will be cleared after
H_RESET (since SWSTYLE de-
faults to ZERO) and is not af-
fected by S_RESET or by setting
the STOP bit.
If SSIZE32 is cleared to ZERO,
then bits IADR[31:24] of CSR2
will be used to generate values
for the upper 8 bits of the 32 bit
address
accesses
PCnet-PCI II controller. This ac-
tion is required, since the 16-bit
software structures will yield
only 24 bits of address for
PCnet-PCI
master accesses.
Undefined
1
0
1
1
accessible
bus
will
initiated
II
Undefined
SSIZE32
during
controller
be
0
1
1
1
Table 35. Software Styles
by
P R E L I M I N A R Y
ignored.
always.
master
16-bit software
structures, non-burst
or burst access
32-bit software
structures, non-burst
or burst access
32-bit software
structures, non-burst
or burst access
32-bit software
structures, non-burst
or burst access
Undefined
Am79C970A
bus
the
Block Entries
Initialization
7–0 SWSTYLE
16-bit software
structures, non-burst
access only
32-bit software
structures, non-burst
access only
32-bit software
structures, non-burst
access only
32-bit software
structures, non-burst
or burst access
Undefined
Ring Entries
Descriptor
If SSIZE32 is set to ONE, then
the software structures that are
common to the PCnet-PCI II
controller and the host system
will supply a full 32 bits for each
address pointer that is needed by
the PCnet-PCI II controller for
performing master accesses.
The value of the SSIZE32 bit has
no effect on the drive of the upper
8 address bits. The upper 8 ad-
dress pins are always driven, re-
gardless of the state of the
SSIZE32 bit.
Note that the setting of the
SSIZE32 bit has no effect on the
width for I/O accesses. I/O
access width is determined by
the state of the DWIO bit
(BCR18, bit 7).
Software Style register. The
value in this register determines
the style of register and memory
resources that shall be used by
the PCnet-PCI II controller. The
Software Style selection will
affect the interpretation of a few
bits within the CSR space, the or-
der of the descriptor entries and
the width of the descriptors and
initialization block entries.
All PCnet-PCI II controller CSR
bits and BCR bits and all
descriptor, buffer and initializa-
tion block entries not cited in the
table above are unaffected by the
software style selection.
All bits in CSR4 are
used, TMD1[29] is
ADD_FCS
CSR4[9:8],CSR4[5:4]
and CSR4[1:0] have
no function, TMD1[29]
is NO_FCS.
All bits in CSR4 are
used, TMD1[29] is
ADD_FCS
All bits in CSR4 are
used, TMD1[29] is
ADD_FCS
Undefined
Interpretations
Altered Bit