AM79C970A Advanced Micro Devices, AM79C970A Datasheet - Page 170

• Manufacturer Part Number: AM79C970A
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: Advanced Micro Devices

Control and Status Registers
Note: u = undefined value, R = Running register, S = Setup register, T = Test register
170
RAP Addr
AMD
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
Symbol
CSR0
CSR1
CSR2
CSR3
CSR4
CSR5
CSR6
CSR7
CSR8
CSR9
CSR10
CSR11
CSR12
CSR13
CSR14
CSR15
CSR16
CSR17
CSR18
CSR22
CSR20
CSR21
CSR22
CSR23
CSR24
CSR25
CSR26
CSR27
CSR28
CSR29
CSR30
CSR31
CSR32
CSR33
CSR34
CSR35
CSR36
CSR37
Default Value
see reg. desc.
uuuu 0004
uuuu uuuu
uuuu uuuu
uuuu 0000
uuuu 0115
uuuu 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
P R E L I M I N A R Y
PCnet-PCI II Controller Status Register
Lower IADR]: Maps to Location 16
Upper IADR: Maps to Location 17
Interrupt Masks and Deferral Control
Test and Features Control
Extended Control and Interrupt
RXTX: RX/TX Encoded Ring Lengths
Reserved
LADR0: Logical Address Filter — LADRF[15:0]
LADR1: Logical Address Filter — LADRF[31:16]
LADR2: Logical Address Filter — LADRF[47:32]
LADR3: Logical Address Filter — LADRF[63:48]
PADR0: Physical Address Register — PADR[15:0][
PADR1: Physical Address Register — PADR[31:16]
PADR2: Physical Address Register — PADR[47:32]
MODE: Mode Register
IADR[15:0]: Base Address of INIT Block Lower (Copy)
IADR[31:16]: Base Address of INIT Block Upper (Copy)
CRBAL: Current Receive Buffer Address Lower
CRBAU: Current Receive Buffer Address Upper
CXBAL: Current Transmit Buffer Address Lower
CXBAU: Current Transmit Buffer Address Upper
NRBAL: Next Receive Buffer Address Lower
NRBAU: Next Receive Buffer Address Upper
BADRL: Base Address of Receive Ring Lower
BADRU: Base Address of Receive Ring Upper
NRDAL: Next Receive Descriptor Address Lower
NRDAU: Next Receive Descriptor Address Upper
CRDAL: Current Receive Descriptor Address Lower
CRDAU: Current Receive Descriptor Address Upper
BADXL: Base Address of Transmit Descriptor Ring Lower
BADXU: Base Address of Transmit Descriptor Ring Upper
NXDAL: Next XMT Descriptor Address Lower
NXDAU: Next XMT Descriptor Address Upper
CXDAL: Current Transmit Descriptor Address Lower
CXDAU: Current Transmit Descriptor Address Upper
NNRDAL: Next Next Receive Descriptor Address Lower
NNRDAU: Next Next Receive Descriptor Address Upper
Am79C970A
Comments
Use
R
S
S
S
R
R
S
S
S
S
S
S
S
S
S
T
T
T
S
S
T
S
S
T
T
T
T
T
T
T
T
T
T
T
T
T
T