mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 77

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

1
2.3.26
Freescale Semiconductor
Address 0x025A
Read: Anytime
Write: Anytime
DDRP
DDRP
DDRP
DDRP
Field
Reset
4-2
5
1
0
W
R
Data Direction Register port P —
This bit determines whether the associated pin is an input or output.
The enabled IRQ function forces the I/O state to be an input if enabled. In this case the data direction bit will not
change.
1 Associated pin is configured as output
0 Associated pin is configured as input
Data Direction Register port P —
This bit determines whether the associated pin is an input or output.
1 Associated pin is configured as output
0 Associated pin is configured as input
Data Direction Register port P —
This bit determines whether the associated pin is an input or output.
The I/O state of the pin is forced to input level upon the first clearing of the X bit and held in this state even if the bit
is set again. The PWM forces the I/O state to be an output for an enabled channel. In this case the data direction bit
will not change.
1 Associated pin is configured as output
0 Associated pin is configured as input
Data Direction Register port P —
This bit determines whether the associated pin is an input or output.
The PWM forces the I/O state to be an output for an enabled channel. In this case the data direction bit will not
change.
1 Associated pin is configured as output
0 Associated pin is configured as input
Port P Data Direction Register (DDRP)
0
0
7
0
0
6
Figure 2-25. Port P Data Direction Register (DDRP)
Table 2-27. DDRP Register Field Descriptions
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
DDRP5
5
0
DDRP4
0
4
Description
DDRP3
0
3
DDRP2
Port Integration Module (S12VRPIMV2)
0
2
DDRP1
Access: User read/write
0
1
DDRP0
0
0
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