mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 215

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Read: DBGACTL if COMRV[1:0] = 00
DBGBCTL if COMRV[1:0] = 01
DBGCCTL if COMRV[1:0] = 10
Write: DBGACTL if COMRV[1:0] = 00 and DBG not armed
DBGBCTL if COMRV[1:0] = 01 and DBG not armed
DBGCCTL if COMRV[1:0] = 10 and DBG not armed
Freescale Semiconductor
Address: 0x0028
Address: 0x0028
Address: 0x0028
(Comparators
(Comparators
Reset
Reset
Reset
A and B)
A and B)
Field
SZE
W
W
W
SZ
R
R
R
7
6
SZE
SZE
0
0
0
0
7
7
7
Figure 6-14. Debug Comparator Control Register DBGBCTL (Comparator B)
Figure 6-15. Debug Comparator Control Register DBGCCTL (Comparator C)
Figure 6-13. Debug Comparator Control Register DBGACTL (Comparator A)
Size Comparator Enable Bit — The SZE bit controls whether access size comparison is enabled for the
associated comparator. This bit is ignored if the TAG bit in the same register is set.
0 Word/Byte access size is not used in comparison
1 Word/Byte access size is used in comparison
Size Comparator Value Bit — The SZ bit selects either word or byte access size in comparison for the
associated comparator. This bit is ignored if the SZE bit is cleared or if the TAG bit in the same register is set.
0 Word access size is compared
1 Byte access size is compared
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
SZ
SZ
0
0
0
0
6
6
6
MC9S12VR Family Reference Manual, Rev. 2.2
Table 6-22. DBGXCTL Field Descriptions
Preliminary - Subject to Change Without Notice
TAG
TAG
TAG
0
0
0
5
5
5
BRK
BRK
BRK
0
0
0
4
4
4
Description
RW
RW
RW
0
0
0
3
3
3
RWE
RWE
RWE
0
0
0
2
2
2
S12S Debug Module (S12SDBGV2)
NDB
0
0
0
0
0
1
1
1
COMPE
COMPE
COMPE
0
0
0
0
0
0
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