mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 286

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Pulse-Width Modulator (S12PWM8B8CV2)
9.3.2.5
The PWMCAE register contains eight control bits for the selection of center aligned outputs or left aligned
outputs for each PWM channel. If the CAEx bit is set to a one, the corresponding PWM output will be
center aligned. If the CAEx bit is cleared, the corresponding PWM output will be left aligned. See
Section 9.4.2.5, “Left Aligned Outputs”
description of the PWM output modes.
Read: Anytime
Write: Anytime
286
Module Base + 0x0004
PCKB[2:0]
PCKA[2:0]
s
Reset
Field
6–4
2–0
W
R
CAE7
Prescaler Select for Clock B — Clock B is one of two clock sources which can be used for all channels. These
three bits determine the rate of clock B, as shown in
Prescaler Select for Clock A — Clock A is one of two clock sources which can be used for all channels. These
three bits determine the rate of clock A, as shown in
PWM Center Align Enable Register (PWMCAE)
0
7
Write these bits only when the corresponding channel is disabled.
CAE6
Figure 9-7. PWM Center Align Enable Register (PWMCAE)
PCKA/B2
0
6
0
0
0
0
1
1
1
1
Table 9-8. Clock A or Clock B Prescaler Selects
Table 9-7. PWMPRCLK Field Descriptions
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
CAE5
PCKA/B1
0
5
and
0
0
1
1
0
0
1
1
Section 9.4.2.6, “Center Aligned Outputs”
CAE4
PCKA/B0
NOTE
0
4
0
1
0
1
0
1
0
1
Description
Table
Table
CAE3
9-8.
9-8.
0
3
Value of Clock A/B
Bus clock / 128
Bus clock / 16
Bus clock / 32
Bus clock / 64
Bus clock / 2
Bus clock / 4
Bus clock / 8
Rev. 2.2
Bus clock
CAE2
0
2
Freescale Semiconductor
CAE1
for a more detailed
0
1
CAE0
0
0