mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 274

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Analog-to-Digital Converter (ADC12B6CV2)
or level sensitive with polarity control.
of control bits and their effect on the external trigger function.
In either level or edge sensitive mode, the first conversion begins when the trigger is received.
Once ETRIGE is enabled a conversion must be triggered externally after writing to ATDCTL5 register.
During a conversion in edge sensitive mode, if additional trigger events are detected the overrun error flag
ETORF is set.
If level sensitive mode is active and the external trigger de-asserts and later asserts again during a
conversion sequence, this does not constitute an overrun. Therefore, the flag is not set. If the trigger is left
active in level sensitive mode when a sequence is about to be complete, another sequence will be triggered
immediately.
8.4.2.2
Each ATD input pin can be switched between analog or digital input functionality. An analog multiplexer
makes each ATD input pin selected as analog input available to the A/D converter.
The pad of the ATD input pin is always connected to the analog input channel of the analog mulitplexer.
Each pad input signal is buffered to the digital port register.
This buffer can be turned on or off with the ATDDIEN register for each ATD input pin.
This is important so that the buffer does not draw excess current when an ATD input pin is selected as
analog input to the ADC12B6C.
274
General-Purpose Digital Port Operation
ETRIGLE
X
X
0
0
1
1
ETRIGP
X
X
0
1
0
1
MC9S12VR Family Reference Manual,
Table 8-23. External Trigger Control Bits
Preliminary - Subject to Change Without Notice
ETRIGE
Table 8-23
0
0
1
1
1
1
SCAN
gives a brief description of the different combinations
X
X
X
X
0
1
Ignores external trigger. Performs one
conversion sequence and stops.
Ignores external trigger. Performs
continuous conversion sequences.
Trigger falling edge sensitive. Performs
one conversion sequence per trigger.
Trigger rising edge sensitive. Performs one
conversion sequence per trigger.
Trigger low level sensitive. Performs
continuous conversions while trigger level
is active.
Trigger high level sensitive. Performs
continuous conversions while trigger level
is active.
Rev. 2.2
Description
Freescale Semiconductor