mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 126

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mc9s12vr48

Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clock, Reset and Power Management (S12CPMU_UHV)
4.2.6
VSS must be grounded.
4.2.7
This pin provides the signal selected via APIES and is enabled with APIEA bit. See the device
specification if this clock output is available on this device and to which pin it might be connects.
4.2.8
Node VDD is a device internal supply output of the voltage regulator that provides the power supply for
the core logic.
This supply domain is monitored by the Low Voltage Reset circuit.
4.2.9
Node VDDF is a device internal supply output of the voltage regulator that provides the power supply for
the NVM logic.
This supply domain is monitored by the Low Voltage Reset circuit.
4.2.10
Depending on the VSEL setting either the voltage level generated by the temperature sensor or the VREG
bandgap voltage is driven to a special channel input of the ATD Converter. See device level specification
for connectivity of ATD special channels.
126
VSS, VSSC — Ground Pins
API_EXTCLK — API external clock output pin
VDD— Internal Regulator Output Supply (Core Logic)
VDDF— Internal Regulator Output Supply (NVM Logic)
TEMPSENSE — Internal Temperature Sensor Output Voltage
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Rev. 2.2
Freescale Semiconductor

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