mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 287
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mc9s12vr48
Manufacturer Part Number
mc9s12vr48
Description
S12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12VR48.pdf
(592 pages)
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Note: Bits related to available channels have functional significance. Writing to unavailable bits has no effect. Read from
9.3.2.6
The PWMCTL register provides for various control of the PWM module.
Read: Anytime
Write: Anytime
There are up to four control bits for concatenation, each of which is used to concatenate a pair of PWM
channels into one 16-bit channel. If the corresponding channels do not exist on a particular derivative, then
writes to these bits have no effect and reads will return zeroes. When channels 6 and 7are concatenated,
channel 6 registers become the high order bytes of the double byte channel. When channels 4 and 5 are
concatenated, channel 4 registers become the high order bytes of the double byte channel. When channels
2 and 3 are concatenated, channel 2 registers become the high order bytes of the double byte channel.
When channels 0 and 1 are concatenated, channel 0 registers become the high order bytes of the double
byte channel.
See
Function.
Freescale Semiconductor
Module Base + 0x0005
CAE[7:0]
Reset
Field
Section 9.4.2.7, “PWM 16-Bit Functions”
7–0
unavailable bits return a zero
W
R
CON67
Center Aligned Output Modes on Channels 7–0
0 Channels 7–0 operate in left aligned output mode.
1 Channels 7–0 operate in center aligned output mode.
PWM Control Register (PWMCTL)
0
7
Change these bits only when both corresponding channels are disabled.
= Unimplemented or Reserved
CON45
0
6
Figure 9-8. PWM Control Register (PWMCTL)
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
Table 9-9. PWMCAE Field Descriptions
CON23
0
5
for a more detailed description of the concatenation PWM
CON01
NOTE
0
4
Description
PSWAI
0
3
Pulse-Width Modulator (S12PWM8B8CV2)
PFRZ
0
2
0
0
1
0
0
0
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