mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 117

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 4
Clock, Reset and Power Management (S12CPMU_UHV)
Revision History
4.1
This specification describes the function of the Clock, Reset and Power Management Unit
(S12CPMU_UHV).
Freescale Semiconductor
(Item No)
Rev. No.
V01.00
V02.00
•
•
•
•
The Pierce oscillator (XOSCLCP) provides a robust, low-noise and low-power external clock
source. It is designed for optimal start-up margin with typical crystal oscillators.
The Voltage regulator (VREGAUTO) operates from the range 6V to 18V. It provides all the
required chip internal voltages and voltage monitors.
The Phase Locked Loop (PLL) provides a highly accurate frequency multiplier with internal filter.
The Internal Reference Clock (IRC1M) provides a 1MHz internal clock.
Introduction
(Submitted By)
08. Apr 11
22.Dec 10
Date
Sections Affected
MC9S12VR Family Reference Manual, Rev. 2.2
4.3.2.18/4-153
Preliminary - Subject to Change Without Notice
4.1.2.3/4-121
4.1.2.4/4-122
4.3.2.6/4-134
4.5.2.2/4-170
4.1.3/4-123
4.3.1/4-127
4.4.3/4-164
4.4.4/4-165
4.7.2/4-174
Table 4-14
Table 4-31
Figure 4-1
Figure 4-3
Figure 4-9
Table 4-5
Initial Version.
Added bit CSAD (COP in Stop Mode ACLK Disable) in register
CPMUCLKS. This bit allows halting the COP in Stop Mode (Full or
Pseudo) when ACLK is the COP clock source. Description of Stop
Modes, Block Diagram, CPMUCLKS register and COP Watchdog
feature are updated.
Substantial Change(s)
117