mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 433

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

15.3.2.5
1
Freescale Semiconductor
Module Base + Address 0x0004
LPSLR[1:0]
LPSLRWD
Read: Anytime
Write: Only in special mode
Reserved
Reset
Field
1-0
7-0
7
W
R
Reserved
Slew-Rate Write Disable
This bit indicates that writes to the slew rate register have no effect due to synchronization. It is set after a write
1 Writes to the LPSLR bits are disabled
0 Writes to the LPSLR bits are enabled
Slew-Rate Bit
Please see section
00 Normal Slew Rate (optimized for 20kBit/s).
01 Slow Slew Rate (optimized for 10.4kBit/s).
10 Fast Mode Slew Rate (up to 250kBit/s). This mode is not compliant with the LIN Protocol(LIN electrical
11 Reserved.
Please note that this register is writable only when LPSLRWD is inactive.
These reserved bits are used for test purposes. Writing to these bits can alter the module functionality.
Reserved Register
x
7
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special
mode can alter the module’s functionality.
to the LPSLR bits, and will remain set until the LPSLR value is synchronized.
characteristics like duty cycles, reference levels, etc. are not fulfilled). It is only meant to be used for fast data
transmission. Please refer to section
that an external pull-up stronger than 1kΩ might be necessary for the range 100kbit/s to 250kBit/s.
= Unimplemented
Reserved
6
x
Table 15-8. Reserved RegisterFields Description
Section 15.4.2, “Slew Rate Selection
MC9S12VR Family Reference Manual, Rev. 2.2
Preliminary - Subject to Change Without Notice
Table 15-7. LPSLR Fields Description
Reserved
Figure 15-6. Reserved Register )
x
5
Section 15.4.2.2, “Fast Mode
Reserved
NOTE
4
x
Description
Reserved
for details on how the slew rate control works.
x
3
for more details on fast mode.Please note
Reserved
2
x
LIN Physical Layer (S12LINPHYV1)
Reserved
Access: User read/write
x
1
Reserved
0
x
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