mc9s12vr48 Freescale Semiconductor, Inc, mc9s12vr48 Datasheet - Page 132

• Manufacturer Part Number: mc9s12vr48
• Description: S12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Clock, Reset and Power Management (S12CPMU_UHV)
132
LOCKIF
UPOSC
OSCIF
PORF
LOCK
Field
LVRF
RTIF
ILAF
7
6
5
4
3
2
1
0
Real Time Interrupt Flag — RTIF is set to 1 at the end of the RTI period. This flag can only be cleared by writing
a 1. Writing a 0 has no effect. If enabled (RTIE=1), RTIF causes an interrupt request.
0 RTI time-out has not yet occurred.
1 RTI time-out has occurred.
Power on Reset Flag — PORF is set to 1 when a power on reset occurs. This flag can only be cleared by writing
a 1. Writing a 0 has no effect.
0 Power on reset has not occurred.
1 Power on reset has occurred.
Low Voltage Reset Flag — LVRF is set to 1 when a low voltage reset occurs. This flag can only be cleared by
writing a 1. Writing a 0 has no effect.
0 Low voltage reset has not occurred.
1 Low voltage reset has occurred.
PLL Lock Interrupt Flag — LOCKIF is set to 1 when LOCK status bit changes. This flag can only be cleared by
writing a 1. Writing a 0 has no effect.If enabled (LOCKIE=1), LOCKIF causes an interrupt request.
0 No change in LOCK bit.
1 LOCK bit has changed.
Lock Status Bit — LOCK reflects the current state of PLL lock condition. Writes have no effect.While PLL is
unlocked (LOCK=0) f
stabilization time tlock.
0 VCOCLK is not within the desired tolerance of the target frequency.
1 VCOCLK is within the desired tolerance of the target frequency.
Illegal Address Reset Flag — ILAF is set to 1 when an illegal address reset occurs.Refer to MMC chapter for
details.This flag can only be cleared by writing a 1. Writing a 0 has no effect.
0 Illegal address reset has not occurred.
1 Illegal address reset has occurred.
Oscillator Interrupt Flag — OSCIF is set to 1 when UPOSC status bit changes. This flag can only be cleared
by writing a 1. Writing a 0 has no effect.If enabled (OSCIE=1), OSCIF causes an interrupt request.
0 No change in UPOSC bit.
1 UPOSC bit has changed.
Oscillator Status Bit — UPOSC reflects the status of the oscillator. Writes have no effect. Entering Full Stop
Mode UPOSC is cleared.
0 The oscillator is off or oscillation is not qualified by the PLL.
1 The oscillator is qualified by the PLL.
f
f
PLL
PLL
= f
= f
VCO
VCO
/4.
/(POSTDIV+1).
PLL
MC9S12VR Family Reference Manual,
Preliminary - Subject to Change Without Notice
Table 4-3. CPMUFLG Field Descriptions
is f
VCO
/ 4 to protect the system from high core clock frequencies during the PLL
Description
Rev. 2.2
Freescale Semiconductor