ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 245
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ATxmega32D4
Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32D4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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20.13.5
20.13.5.1
20.13.5.2
20.13.5.3
20.13.6
8210B–AVR–04/10
RESH - ADC Channel Result register High
RESL - ADC Channel Result register Low
12-bit mode, left adjusted
12-bit mode, right adjusted
8-bit mode
• Bit 0 – IF: ADC Channel Interrupt Flag
The interrupt flag is set when the ADC conversion is complete. If the channel is configured for
compare mode, the flag will be set if the compare condition is met. IF is automatically cleared
when the ADC channel interrupt vector is executed. The bit can also be cleared by writing a one
to the bit location.
For all result registers and with any ADC result resolution, a signed number is represented in 2’s
complement form and the MSB represents the sign bit.
The RESL and RESH register pair represents the 16-bit value ADCRESULT. Reading and writ-
ing 16-bit values require special attention, refer to
details.
• Bits 7:0 - RES[11:4]: ADC Channel Result, high byte
These are the 8 MSB of the 12-bit ADC result.
• Bits 7:4 - Reserved
These bits will in practice be the extension of the sign bit CHRES11 when ADC works in differen-
tial mode and set to zero when ADC works in signed mode.
• Bits 3:0 - RES[11:8]: ADC Channel Result, high byte
These are the 4 MSB of the 12-bit ADC result.
• Bits 7:0 - Reserved
These bits will in practice be the extension of the sign bit CHRES7 when ADC works in signed
mode and set to zero when ADC works in single-ended mode.
12-bit, left.
12-bit, right
8-bit
12-/8-
12-bit, left.
Bit
+0x05
Read/Write
Initial Value
Bit
+0x04
Read/Write
Initial Value
R
R
7
–
–
0
7
0
R
R
6
–
–
0
6
0
RES[3:0]
R
R
5
–
–
0
5
0
”Accessing 16-bits Registers” on page 12
R
R
4
–
–
0
4
0
RES[11:4]
RES[7:0]
R
R
3
–
0
3
–
0
R
R
2
–
0
2
–
0
RES[11:8]
XMEGA D
R
R
1
–
0
1
–
0
R
R
0
–
0
0
–
0
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