ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 144
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ATxmega32D4
Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32D4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
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Part Number:
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Manufacturer:
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Quantity:
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12.11.12 CNTH - Counter Register H
12.11.13 CNTL - Counter Register L
12.11.14 PERH - Period Register H
8210B–AVR–04/10
For more details refer to
The CNTH and CNTL register pair represents the 16-bit value CNT. CNT contains the 16-bit
counter value in the Timer/Counter. The CPU write access has priority over count, clear, or
reload of the counter.
For more details on reading and writing 16-bit register refer to
page
• Bit 7:0 - CNT[15:8]
These bits holds the 8 MSB of the 16-bit Counter register.
• Bit 7:0 - CNT[7:0]
These bits holds the 8 LSB of the 16-bit Counter register.
The PERH and PERL register pair represents the 16-bit value PER. PER contains the 16-bit
TOP value in the Timer/Counter.
• Bit 7:0 - PER[15:8]
These bits holds the 8 MSB of the 16-bit Period register.
Bit
+0x0F
Read/Write
Initial Value
Bit
+0x21
Read/Write
Initial Value
Bit
+0x20
Read/Write
Initial Value
Bit
+0x27
Read/Write
Initial Value
12.
R/W
R/W
R/W
R/W
7
0
7
1
7
0
7
0
R/W
R/W
R/W
R/W
6
0
6
1
”Accessing 16-bits Registers” on page
6
0
6
0
R/W
R/W
R/W
R/W
5
0
5
1
5
0
5
0
R/W
R/W
R/W
R/W
4
0
4
1
4
0
4
0
TEMP[7:0]
PER[15:8]
CNT[15:8]
CNT[7:0]
R/W
R/W
R/W
R/W
3
0
3
1
3
0
3
0
R/W
R/W
R/W
R/W
2
0
2
1
2
0
2
0
”Accessing 16-bits Registers” on
12.
R/W
R/W
R/W
R/W
1
0
1
1
1
0
1
0
XMEGA D
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
1
TEMP
CNTH
PERH
CNTL
144