ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 216
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ATxmega32D4
Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32D4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Manufacturer
Quantity
Price
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18.14.5
8210B–AVR–04/10
CTRLC - USART Control Register C
become effective until ongoing and pending transmissions are completed, i.e., when the Trans-
mit Shift Register and Transmit Buffer Register do not contain data to be transmitted. When
disabled, the Transmitter will no longer override the TxD port.
• Bit 2 - CLK2X: Double Transmission Speed
Writing this bit to one will reduce the divisor of the baud rate divider from16 to 8 effectively dou-
bling the transfer rate for asynchronous communication modes. For synchronous operation this
bit has no effect and should always be written to zero. This bit must be zero when the USART
Communication Mode is configured to IRCOM.
This bit is unused in Master SPI mode of operation.
• Bit 1 - MPCM: Multi-processor Communication Mode
This bit enables the Multi-processor Communication mode. When the MPCM bit is written to
one, the USART Receiver ignores all the incoming frames that do not contain address informa-
tion. The Transmitter is unaffected by the MPCM setting. For more detailed information see
”Multi-processor Communication Mode” on page
This bit is unused in Master SPI mode of operation.
• Bit 0 - TXB8: Transmit Bit 8
TXB8 is the ninth data bit in the character to be transmitted when operating with serial frames
with nine data bits. When used this bit must be written before writing the low bits to DATA.
This bit is unused in Master SPI mode of operation.
Note:
• Bits 7:6 - CMODE[1:0]: USART Communication Mode
These bits select the mode of operation of the USART as shown in
Table 18-6.
1.
2.
Bit
+0x05
+0x05
Read/Write
Initial Value
(1)
CMODE[1:0]
1. Master SPI mode
See
See
00
01
10
11
7
”IRCOM - IR Communication Module” on page 220
”USART” on page 199
CMODE bit settings
R/W
0
CMODE[1:0]
CMODE[1:0]
6
Group Configuration
R/W
ASYNCHRONOUS
0
SYNCHRONOUS
IRCOM
MSPI
for full description of the Master SPI Mode (MSPIM) operation
5
R/W
–
0
PMODE[1:0]
4
R/W
Mode
Asynchronous USART
Synchronous USART
IRCOM
Master SPI
–
0
212.
3
(1)
SBMODE
R/W
(2)
–
0
for full description on using IRCOM mode.
2
UDORD
Table
R/W
1
18-6.
1
CHSIZE[2:0]
XMEGA D
UCPHA
R/W
1
0
R/W
–
0
216