ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 159
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ATxmega32D4
Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega32D4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega32D4-AU
Manufacturer:
Atmel
Quantity:
123
Part Number:
ATxmega32D4-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega32D4-CU
Manufacturer:
Maxim
Quantity:
71
Company:
Part Number:
ATxmega32D4-MH
Manufacturer:
Atmel
Quantity:
1 910
Company:
Part Number:
ATxmega32D4-MH
Manufacturer:
Atmel
Quantity:
1 704
Part Number:
ATxmega32D4-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
14.7.6
14.7.7
14.7.8
14.7.9
8210B–AVR–04/10
DTBOTHBUF - Dead-time Concurrent Write to Both Sides Buffer
DTLS - Dead-Time Low Side Register
DTHS - Dead-Time High Side Register
DTLSBUF - Dead-Time Low Side Buffer Register
• Bit 7:0 - DTBOTH: Dead-Time Both Sides
Writing to this register will update both DTHS and DTLS registers at the same time (i.e. at the
same I/O write access).
• Bit 7:0 - DTBOTHBUF: Dead-Time Both Sides Buffer
Writing to this memory location will update both DTHSBUF and DTLSBUF registers at the same
time (i.e. at the same I/O write access).
• Bit 7:0 - DTLS: Dead-Time Low Side
This register holds the number of peripheral clock cycles for the Dead-Time Low Side.
• Bit 7:0 - DTHS: Dead-Time High Side
This register holds the number of peripheral clock cycles for the Dead-Time High Side.
• Bit 7:0 - DTLSBUF: Dead-Time Low Side Buffer
This register is the buffer for the DTLS Register. If double buffering is used, valid contents in this
register is copied to the DTLS Register on an UPDATE condition.
Bit
+0x07
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
Bit
+0x08
Read/Write
Initial Value
Bit
+0x09
Read/Write
Initial Value
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
R/W
DTBOTHBUF[7:0]
R/W
R/W
4
0
R/W
4
0
4
0
4
0
DTLSBUF[7:0]
DTHS[7:0]
DTLS[7:0]
R/W
3
0
R/W
R/W
R/W
3
0
3
0
3
0
R/W
2
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
1
0
R/W
R/W
R/W
1
0
1
0
1
0
XMEGA D
R/W
0
0
R/W
R/W
R/W
0
0
0
0
0
0
DTBOTHBUF
DTLSBUF
DTHS
DTLS
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