876784 Intel, 876784 Datasheet - Page 802
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876784
Manufacturer Part Number
876784
Description
Manufacturer
Intel
Datasheet
1.876784.pdf
(848 pages)
Specifications of 876784
Lead Free Status / RoHS Status
Compliant
- Current page: 802 of 848
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Table 23-9. Clock Timings (Sheet 2 of 2)
802
1. CLK14 edge rates in a system as measured from 0.8 V to 2.0 V.
2. The CLK48 expects a 40/60% duty cycle.
3. The maximum high time (t18 Max) provides a simple method for devices to detect bus idle conditions.
4. The ICH7 can tolerate a maximum of 2 ns of jitter from the input BITCLK. Note that clock jitter may impact
5. BITCLK Rise and Fall times are measured from 10%VDD and 90%VDD.
6. SUSCLK duty cycle can range from 30% minimum to 70% maximum.
NOTES:
f ac97
f suscl
fHDA
Sym
t26a
t27a
t28a
t39a
t26
t27
t28
t29
t30
t36
t37
t38
t39
system timing. Contact your Intel representative for further details and documentation.
k
SATA Clock (SATA_CLKP, SATA_CLKN) / DMI Clock (DMI_CLKP, DMI_CLKN)
AC ’97 Clock (ACZ_BIT_CLK - AC ‘97 mode) (Desktop and Mobile Only)
Operating Frequency
Input Jitter (refer to Clock Chip
Specification)
High time
Low time
Rise time
Fall time
Operating Frequency
Frequency Tolerance
Input Jitter (refer to Clock Chip
Specification)
High Time (Measured at 0.75Vcc)
Low Time (Measured at 0.35Vcc)
Period
Rise time
Fall time
Operating Frequency
High Time
Low Time
ACZ_BIT_CLK (Intel ® High Definition Audio Mode)
Parameter
(Desktop and Mobile Only)
Suspend Clock (SUSCLK)
18.75
18.75
9.997
Min
175
175
2.0
2.0
36
36
10
10
—
—
—
12.288
24.0
32
10.053
22.91
22.91
Max
300
700
100
700
6.0
6.0
45
45
—
—
2
3
Intel
Unit
MHz
MHz
ppm
ppm
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
us
us
®
Electrical Characteristics
ICH7 Family Datasheet
Notes
4
5
5
6
6
6
Figur
23-1
23-1
23-1
23-1
23-1
23-1
e
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