876784 Intel, 876784 Datasheet - Page 328

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876784

Manufacturer Part Number
876784
Description
Manufacturer
Intel
Datasheet

Specifications of 876784

Lead Free Status / RoHS Status
Compliant
Table 8-6.
328
Statistical Counters (Sheet 2 of 2)
The Statistical Counters are initially set to 0 by the ICH7’s integrated LAN controller
after reset. They cannot be preset to anything other than 0. The LAN controller
increments the counters by internally reading them, incrementing them and writing
them back. This process is invisible to the processor and PCI bus. In addition, the
counters adhere to the following rules:
• The counters are wrap-around counters. After reaching FFFFFFFFh the counters
• The LAN controller updates the required counters for each frame. It is possible for
• The counters are 32 bits wide and their behavior is fully compatible with the IEEE
ID
44
48
52
56
60
64
68
72
76
78
wrap around to 0.
more than one counter to be updated as multiple errors can occur in a single frame.
802.1 standard. The LAN controller supports all mandatory and recommend
Receive Alignment
Errors
Receive Resource
Errors
Receive Overrun
Errors
Receive Collision
Detect (CDT)
Receive Short
Frame Errors
Flow Control
Transmit Pause
Flow Control
Receive Pause
Flow Control
Receive
Unsupported
Receive TCO Frames
Transmit TCO
Frames
Counter
This counter contains the number of frames that are both
misaligned (for example, CRS de-asserts on a non-octal
boundary) and contain a CRC error. The counter is updated, if
needed, regardless of the Receive Unit state. The Receive
Alignment Errors counter is mutually exclusive of the Receive
CRC Errors and Receive Short Frame Errors counters.
This counter contains the number of good frames discarded due
to unavailability of resources. Frames intended for a host whose
Receive Unit is in the No Resources state fall into this category. If
the LAN controller is configured to Save Bad Frames and the
status of the received frame indicates that it is a bad frame, the
Receive Resource Errors counter is not updated.
This counter contains the number of frames known to be lost
because the local system bus was not available. If the traffic
problem persists for more than one frame, the frames that follow
the first are also lost; however, because there is no lost frame
indicator, they are not counted.
This counter contains the number of frames that encountered
collisions during frame reception.
This counter contains the number of received frames that are
shorter than the minimum frame length. The Receive Short
Frame Errors counter is mutually exclusive to the Receive
Alignment Errors and Receive CRC Errors counters. A short frame
will always increment only the Receive Short Frame Errors
counter.
This counter contains the number of Flow Control frames
transmitted by the LAN controller. This count includes both the
Xoff frames transmitted and Xon (PAUSE(0)) frames transmitted.
This counter contains the number of Flow Control frames
received by the LAN controller. This count includes both the Xoff
frames received and Xon (PAUSE(0)) frames received.
This counter contains the number of MAC Control frames
received by the LAN controller that are not Flow Control Pause
frames. These frames are valid MAC control frames that have the
predefined MAC control Type value and a valid address but has
an unsupported opcode.
This counter contains the number of TCO packets received by the
LAN controller.
This counter contains the number of TCO packets transmitted.
LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
Description
Intel
®
ICH7 Family Datasheet

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