876784 Intel, 876784 Datasheet - Page 432

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

Table 10-11. ACPI and Legacy I/O Register Map (Sheet 2 of 2)
10.8.3.1
Note:
432
PMBASE
+ Offset
51h–5Fh
54h–57h
60h–7Fh
50h
50h
PM1_STS—Power Management 1 Status Register
I/O Address:
Default Value:
Lockable:
Power Well:
If bit 10 or 8 in this register is set, and the corresponding _EN bit is set in the PM1_EN
register, then the ICH7 will generate a Wake Event. Once back in an S0 state (or if
already in an S0 state when the event occurs), the ICH7 will also generate an SCI if the
SCI_EN bit is set, or an SMI# if the SCI_EN bit is not set.
Bit 5 does not cause an SMI# or a wake event. Bit 0 does not cause a wake event but
can cause an SMI# or SCI.
Mnemonic
SS_CNT
C3_RES
—
—
—
PMBASE + 00h
0000h
No
Bits 0
Bits 8
except Bit 11 in RTC
(ACPI PM1a_EVT_BLK)
Reserved (Desktop Only)
Intel SpeedStep
Technology Control
(Mobile/Ultra Mobile
Only)
Reserved
C3-Residency Register
(Mobile/Ultra Mobile
Only)
Reserved for TCO
–
–
Register Name
7: Core,
15: Resume,
®
—
Attribute:
Size:
Usage:
ACPI Pointer
—
—
LPC Interface Bridge Registers (D31:F0)
Intel
00000000h
R/WC
16-bit
ACPI or Legacy
Default
01h
®
—
—
ICH7 Family Datasheet
R/W (special)
RO, R/W
Type
—
—