876784 Intel, 876784 Datasheet - Page 770

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

21.1.5
21.1.6
770
BBAR—BIOS Base Address Register
(SPI Memory Mapped Configuration Registers)
Memory Address:SPIBAR + 50h
Default Value:
NOTE: This register is not writable when the SPI Configuration Lock-Down bit (SPIBAR + 00h:15)
PREOP—Prefix Opcode Configuration Register
(SPI Memory Mapped Configuration Registers)
Memory Address:SPIBAR + 54h
Default Value:
NOTE: This register is not writable when the SPI Configuration Lock-Down bit (SPIBAR + 00h:15)
31:24
23:8
15:8
7:0
7:0
Bit
Bit
is set.
is set.
Reserved.
Bottom of System Flash — R/W. This field determines the bottom of the System
BIOS. The Intel
address field is less than this value. This field corresponds to bits 23:8 of the 3-byte
address; bits 7:0 are assumed to be 00h for this vector when comparing to a potential
SPI address.
NOTE: Software must always program 1s into the upper, Don’t Care, bits of this field
NOTE: In the event that this value is programmed below some of the BIOS Memory
Reserved
Prefix Opcode 1— R/W. Software programs an SPI opcode into this field that is
permitted to run as the first command in an atomic cycle sequence.
Prefix Opcode 0 — R/W. Software programs an SPI opcode into this field that is
permitted to run as the first command in an atomic cycle sequence.
based on the flash size. Hardware does not know the size of the flash array and
relies upon the correct programming by software. The default value of 0000h
results in all cycles allowed.
segments, described above, this protection policy takes precedence.
00000000h
0004h
®
ICH7 will not run programmed commands nor memory reads whose
Serial Peripheral Interface (SPI) (Desktop and Mobile Only)
Description
Description
Size:
Size:
Attribute:
Attribute:
Intel
R/W
32 bits
R/W
16 bits
®
ICH7 Family Datasheet